IP Library Assignment 046589/0726
Patent Assignment
Reel/Frame 046589/0726

Assignment of Assignor's Interest

Recorded: 2018-08-08 Pages: 6
Assignor
MIPS TECH LIMITED
Executed: 2018-02-16
Assignee
MIPS TECH, LLC
3201 SCOTT BLVD., SANTA CLARA, CALIFORNIA, 95054
Covered Properties (30)
Read-Only Access to Cpo Registers
Patent: 7,181,600 →
Application: 09/921,377 →
Atomic Update of Cpo State
Patent: 7,185,183 →
Application: 09/921,400 →
Configurable Prioritization of Core Generated Interrupts
Patent: 7,552,261 →
Application: 09/977,089 →
Publication: US 2003/0074508
Method and Apparatus for Clearing Hazards Using Jump Instructions
Patent: 7,000,095 →
Application: 10/238,993 →
Publication: US 2004/0049660
Mechanisms for Assuring Quality of Service for Programs Executing on a Multithreaded Processor
Patent: 7,376,954 →
Application: 10/684,350 →
Publication: US 2005/0050395
Method and Apparatus for Global Ordering to Insure Latency Independent Coherence
Patent: 7,644,237 →
Application: 10/783,960 →
Synchronized Storage Providing Multiple Synchronization Semantics
Patent: 7,711,931 →
Application: 10/954,988 →
Publication: US 2005/0251613
Instruction/Skid Buffers in a Multithreading Microprocessor That Store Dispatched Instructions to Avoid Re-Fetching Flushed Instructions
Patent: 7,853,777 →
Application: 11/051,978 →
Publication: US 2006/0179274
Interfacing External Thread Prioritizing Policy Enforcing Logic with Customer Modifiable Register to Processor Internal Scheduler
Patent: 7,613,904 →
Application: 11/051,997 →
Publication: US 2006/0179279
Three-Tiered Translation Lookaside Buffer Hierarchy in a Multithreading Microprocessor
Patent: 7,558,939 →
Application: 11/075,041 →
Publication: US 2006/0206686
Method and Apparatus for Clearing Hazards Using Jump Instructions
Patent: 8,171,262 →
Application: 11/284,069 →
Publication: US 2006/0101255
Instruction Encoding for System Register Bit Set and Clear
Patent: 7,600,100 →
Application: 11/567,290 →
Publication: US 2007/0234020
Horizontally-Shared Cache Victims in Multiple Core Processors
Patent: 7,774,549 →
Application: 11/681,610 →
Publication: US 2008/0091880
Method and Apparatus for Global Ordering to Insure Latency Independent Coherence
Patent: 8,037,253 →
Application: 12/557,421 →
Publication: US 2010/0005247
Instruction Encoding for System Register Bit Set and Clear
Patent: 8,190,865 →
Application: 12/576,942 →
Publication: US 2010/0031005
Multithreading Microprocessor with Optimized Thread Scheduler for Increasing Pipeline Utilization Efficiency
Patent: 8,151,268 →
Application: 12/684,564 →
Publication: US 2010/0115244
Microprocessor with Dual-Level Address Translation
Patent: 8,239,620 →
Application: 12/891,503 →
Publication: US 2012/0079164
Microprocessor System for Virtual Machine Execution
Patent: 8,789,042 →
Application: 12/891,530 →
Publication: US 2012/0079479
Apparatus and Method for Guest and Root Register Sharing in a Virtual Machine
Patent: 9,086,906 →
Application: 13/436,654 →
Publication: US 2013/0263124
Restoring a Register Renaming Map
Patent: 9,128,700 →
Application: 13/563,025 →
Publication: US 2013/0179665
Processor with Kernel Mode Access to User Space Virtual Addresses
Patent: 9,235,510 →
Application: 13/683,875 →
Publication: US 2013/0132702
Deferred Saving of Registers in a Shared Register Pool for a Multithreaded Microprocessor
Application: 13/774,140 →
Publication: US 2014/0244977
Way Lookahead
Patent: 9,720,840 →
Application: 13/781,319 →
Publication: US 2014/0244933
Apparatus and Method for Operating a Processor with an Operation Cache
Patent: 9,189,412 →
Application: 13/789,443 →
Publication: US 2014/0258624
Superforwarding Processor
Application: 13/828,747 →
Publication: US 2014/0281413
Restoring a Register Renaming Map
Patent: 9,436,470 →
Application: 14/816,651 →
Publication: US 2015/0339123
Apparatus and Method of Throttling Hardware Pre-fetch
Application: 14/919,922 →
Publication: US 2016/0117250
Translation Lookaside Buffer
Application: 15/824,613 →
Publication: US 2018/0089102
Migration of Data to Register File Cache
Application: 15/833,555 →
Publication: US 2018/0095885
Decoding Instructions That Are Modified By One Or More Other Instructions
Application: 15/874,724 →
Publication: US 2018/0143835
Related Assignments (14)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 8, 2010
From: JENSEN, MICHAEL G.; JONES, DARREN M.; KINTER, RYAN C.; VISHIN, SANJAY
To: MIPS TECHNOLOGIES, INC.
Reel/Frame 023754/0064 →
Change of Name Apr 20, 2017
From: MIPS TECHNOLOGIES, INC.
To: IMAGINATION TECHNOLOGIES, LLC
Reel/Frame 042301/0084 →
Change of Name May 1, 2017
From: MIPS TECHNOLOGIES, INC.
To: IMAGINATION TECHNOLOGIES, LLC
Reel/Frame 042375/0221 →
Change of Name May 2, 2017
From: MIPS TECHNOLOGIES, INC.
To: IMAGINATION TECHNOLOGIES, LLC
Reel/Frame 042383/0672 →
Assignment of Assignor's Interest Aug 8, 2018
From: IMAGINATION TECHNOLOGIES LIMITED
To: HELLOSOFT LIMITED
Reel/Frame 046588/0985 →
Assignment of Assignor's Interest Aug 8, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 046589/0282 →
Assignment of Assignor's Interest Aug 9, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 046594/0791 →
Assignment of Assignor's Interest Aug 9, 2018
From: IMAGINATION TECHNOLOGIES LIMITED
To: HELLOSOFT LIMITED
Reel/Frame 046594/0689 →
Assignment of Assignor's Interest Aug 9, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 046594/0825 →
Change of Name Aug 9, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 046752/0698 →
Security Interest Feb 26, 2021
From: WAVE COMPUTING, INC.; MIPS TECH, LLC; MIPS TECH, INC.; HELLOSOFT, INC.
To: WAVE COMPUTING LIQUIDATING TRUST
Reel/Frame 055429/0532 →
Release of Security Interest Jun 14, 2021
From: WAVE COMPUTING LIQUIDATING TRUST
To: MIPS TECH, INC.; HELLOSOFT, INC.; WAVE COMPUTING (UK) LIMITED; IMAGINATION TECHNOLOGIES, INC.
Reel/Frame 056589/0606 →
Security Interest Jun 14, 2021
From: MIPS TECH, LLC; WAVE COMPUTING, INC.
To: CAPITAL FINANCE ADMINISTRATION, LLC
Reel/Frame 056558/0903 →
Release of Security Interest Dec 29, 2022
From: CAPITAL FINANCE ADMINISTRATION, LLC, AS ADMINISTRATIVE AGENT
To: MIPS TECH, LLC; WAVE COMPUTING INC.
Reel/Frame 062251/0251 →