Patent Assignment
Reel/Frame 042375/0221
Change of Name
Recorded: 2017-05-01
Pages: 6
Assignor
MIPS TECHNOLOGIES, INC.
Executed: 2014-03-10
Assignee
IMAGINATION TECHNOLOGIES, LLC
3201 SCOTT BLVD, SANTA CLARA, CALIFORNIA, 95054
Covered Properties
(35)
Method and Apparatus for Predicting Floating-Point Exceptions
Patent:
6,631,392 →
Application:
09/363,638 →
Mechanism for Extending Properties of Virtual Memory Pages by a Tlb
Patent:
6,651,156 →
Application:
09/822,783 →
Mechanism for Programmable Modification of Memory Mapping Granularity
Read-Only Access to Cpo Registers
Patent:
7,181,600 →
Application:
09/921,377 →
Atomic Update of Cpo State
Patent:
7,185,183 →
Application:
09/921,400 →
Configurable Prioritization of Core Generated Interrupts
Method and Apparatus for Clearing Hazards Using Jump Instructions
Instruction Encoding for System Register Bit Set and Clear
Patent:
7,634,638 →
Application:
10/279,210 →
Mechanisms for Assuring Quality of Service for Programs Executing on a Multithreaded Processor
Method and Apparatus for Global Ordering to Insure Latency Independent Coherence
Patent:
7,644,237 →
Application:
10/783,960 →
Apparatus, Method, and Instruction for Initiation of Concurrent Instruction Streams in a Multithreading Microprocessor
Apparatus, Method, and Instruction for Software Management of Multiple Computational Contexts in a Multithreaded Microprocessor
Mechanisms for Dynamic Configuration of Virtual Processor Resources
Integrated Mechanism for Suspension and Deallocation of Computational Threads of Execution in a Processor
Synchronized Storage Providing Multiple Synchronization Semantics
Smart Memory Based Synchronization Controller for a Multi-Threaded Multiprocessor Soc
Instruction/Skid Buffers in a Multithreading Microprocessor That Store Dispatched Instructions to Avoid Re-Fetching Flushed Instructions
Interfacing External Thread Prioritizing Policy Enforcing Logic with Customer Modifiable Register to Processor Internal Scheduler
Three-Tiered Translation Lookaside Buffer Hierarchy in a Multithreading Microprocessor
Method and Apparatus for Clearing Hazards Using Jump Instructions
Software Emulation of Directed Exceptions in a Multithreading Processor
Symmetric Multiprocessor Operating System for Execution on Non-Independent Lightweight Thread Contexts
Symmetric Multiprocessor Operating System for Execution on Non-Independent Lightweight Thread Contexts
Symmetric Multiprocessor Operating System for Execution on Non-Independent Lightweight Thread Contexts
Instruction Encoding for System Register Bit Set and Clear
Symmetric Multiprocessor Operating System for Execution on Non-Independent Lightweight Thread Contexts
Symmetric Multiprocessor Operating System for Execution on Non-Independent Lightweight Thread Contexts
Symmetric Multiprocessor Operating System for Execution on Non-Independent Lightweight Thread Contexts
Avoiding Livelock Using a Cache Manager in Multiple Core Processors
System, Method, and Computer Program Product for Conditionally Suspending Issuing Instructions of a Thread
Three-Tiered Translation Lookaside Buffer Hierarchy in a Multithreading Microprocessor
Method and Apparatus for Global Ordering to Insure Latency Independent Coherence
Instruction Encoding for System Register Bit Set and Clear
Apparatus, Method and Instruction for Initiation of Concurrent Instruction Streams in a Multithreading Microprocessor
Symmetric Multiprocessor Operating System for Execution on Non-Independent Lightweight Thread Contexts
Related Assignments
(16)
Other recorded transfers of the patents in this record — the chain of ownership.
Change of Name
Jan 24, 2018
From: IMAGINATION TECHNOLOGIES, LLC
To: MIPS TECH, LLC
Reel/Frame 045164/0219 →
Change of Name
Mar 8, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 045146/0514 →
Change of Name
Mar 8, 2018
From: IMAGINATION TECHNOLOGIES, LLC
To: MIPS TECH LIMITED
Reel/Frame 045536/0408 →
Assignment of Assignor's Interest
Aug 8, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 046589/0282 →
Change of Name
Aug 8, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 046749/0515 →
Assignment of Assignor's Interest
Aug 8, 2018
From: IMAGINATION TECHNOLOGIES LIMITED
To: HELLOSOFT LIMITED
Reel/Frame 046588/0985 →
Assignment of Assignor's Interest
Aug 8, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 046589/0726 →
Assignment of Assignor's Interest
Aug 9, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 046594/0825 →
Assignment of Assignor's Interest
Aug 9, 2018
From: IMAGINATION TECHNOLOGIES LIMITED
To: HELLOSOFT LIMITED
Reel/Frame 046594/0689 →
Assignment of Assignor's Interest
Aug 9, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 046594/0791 →
Assignment of Assignor's Interest
Sep 12, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 046857/0640 →
Change of Name
Sep 13, 2018
From: IMAGINATION TECHNOLOGIES, LLC
To: MIPS TECH, LLC
Reel/Frame 047089/0773 →
Security Interest
Feb 26, 2021
From: WAVE COMPUTING, INC.; MIPS TECH, LLC; MIPS TECH, INC.; HELLOSOFT, INC.
To: WAVE COMPUTING LIQUIDATING TRUST
Reel/Frame 055429/0532 →
Release of Security Interest
Jun 14, 2021
From: WAVE COMPUTING LIQUIDATING TRUST
To: MIPS TECH, INC.; HELLOSOFT, INC.; WAVE COMPUTING (UK) LIMITED; IMAGINATION TECHNOLOGIES, INC.
Reel/Frame 056589/0606 →
Security Interest
Jun 14, 2021
From: MIPS TECH, LLC; WAVE COMPUTING, INC.
To: CAPITAL FINANCE ADMINISTRATION, LLC
Reel/Frame 056558/0903 →
Release of Security Interest
Dec 29, 2022
From: CAPITAL FINANCE ADMINISTRATION, LLC, AS ADMINISTRATIVE AGENT
To: MIPS TECH, LLC; WAVE COMPUTING INC.
Reel/Frame 062251/0251 →