Linear source follower amplifier
View Patent ↗A linear source follower amplifier is provided with a first metal-oxide semiconductor (MOS) field effect transistor (FET) having a gate to accept an ac input signal and a source to supply an ac output signal. A second MOS FET has a gate to accept the ac input signal, a source connected to the drain of the first MOS FET. A third MOS FET has a drain connected to the source of the first MOS FET, a gate connected to the drain of the second MOS FET, and a source connected to a first reference voltage. A fourth MOS FET has a drain and a gate connected to the drain of the second MOS FET and a source connected to the first reference voltage. A current source has an input connected to a second reference voltage, and an output connected to the drain of the first MOS FET.
1. A linear source follower amplifier comprising:
a first metal-oxide semiconductor (MOS) field effect transistor (FET) selected from a group consisting of NMOS and PMOS, having a gate to accept an ac input signal, a drain, and a source to supply an ac output signal;
a second MOS FET selected from the group having a gate to accept the ac input signal, a source connected to the drain the first MOS FET, and a drain;
a third MOS FET selected from the group, having a drain connected to the source of the first MOS FET, a gate connected to the drain of the second MOS FET, and a source connected to a first reference voltage;
a fourth MOS FET selected from the group, having a drain and a gate connected to the drain of the second MOS FET, and a source connected to the first reference voltage; and,
a current source having an input connected to a second reference voltage, and an output connected to the drain of the first MOS FET.
2. The amplifier of claim 1 wherein the MOS FETs selected from the group are NMOS FETs, and the second reference voltage has a higher potential than the first voltage.
3. The amplifier of claim 1 wherein the MOS FETs selected from the group are PMOS FETs, and the second reference voltage has a lower potential than the first voltage.
4. The amplifier of claim 1 further comprising:
a first capacitor having a first terminal to accept an unbiased ac input signal and a second terminal connected to the gate of the second MOS FET;
a first resistor having a first terminal connected to a third reference voltage, and a second terminal connected to the gate of the second MOS FET; and,
wherein the gate of the second MOS FET accepts a first biased ac input signal.
5. The amplifier of claim 4 wherein the first capacitor second terminal and the first resistor second terminal are connected to the gate of the first MOS FET; and,
wherein the first MOS FET gate accepts the first biased ac input signal.
6. The amplifier of claim 4 further comprising:
a second capacitor having a first terminal to accept the unbiased ac input signal and a second terminal connected to the gate of the first MOS FET;
a second resistor having a first terminal connected to a fourth reference voltage, and a second terminal connected to the gate of the first MOS FET; and,
where the first MOS FET gate accepts a second biased ac input signal.
7. The amplifier of claim 1 further comprising:
a first capacitor having a first terminal to accept an unbiased ac input signal and a second terminal connected to the gate of the first MOS FET; and,
a first resistor having a first terminal connected to a third reference voltage, and a second terminal connected to the gate of the first MOS FET.
8. A linear emitter follower amplifier comprising:
a first n-p-n transistor having a base to accept an ac input signal, a collector, and an emitter to supply an ac output signal;
a first p-n-p transistor having a base to accept an ac input signal, an emitter connected to the collector the first n-p-n transistor, and a collector;
a second n-p-n transistor having a collector connected to the emitter of the first n-p-n transistor, a base connected to the collector of the first p-n-p transistor, and an emitter connected to a first reference voltage;
a third n-p-n transistor having a collector and base connected to the collector of the first p-n-p transistor, and an emitter connected to the first reference voltage; and,
a current source having an input connected to a second reference voltage having a higher voltage potential than the first reference voltage, and an output connected to the collector of the first n-p-n transistor.
9. The amplifier of claim 8 further comprising:
a first capacitor having a first terminal to accept an unbiased ac input signal and a second terminal connected to the base of the first p-n-p transistor;
a first resistor having a first terminal connected to a third reference voltage having a higher voltage potential than the first reference voltage, and a second terminal connected to the base of the first p-n-p transistor; and,
wherein the base of the first p-n-p transistor accepts a first biased ac input signal.
10. The amplifier of claim 9 wherein the second terminal of the first capacitor and the second terminal of the first resistor are connected to the base of the first n-p-n transistor; and,
wherein the base of the first n-p-n transistor accepts the first biased ac input signal.
11. The amplifier of claim 9 further comprising:
a second capacitor having a first terminal to accept the unbiased ac input signal and a second terminal connected to the base of the first n-p-n transistor;
a second resistor having a first terminal connected to a fourth reference voltage having a higher voltage potential than the first reference voltage, and a second terminal connected to the base of the first n-p-n transistor; and,
wherein the base of the first n-p-n transistor accepts a second biased ac input signal.
12. The amplifier of claim 8 further comprising:
a first capacitor having a first terminal to accept an unbiased ac input signal and a second terminal connected to the base of the first n-p-n transistor;
a first resistor having a first terminal connected to a third reference voltage having a higher voltage potential than the first reference voltage, and a second terminal connected to the base of the first n-p-n transistor; and,
wherein the base of the first n-p-n transistor accepts a first biased ac input signal.
13. A linear emitter follower amplifier comprising:
a first p-n-p transistor having a base to accept an ac input signal, a collector, and an emitter to supply an ac output signal;
a first n-p-n transistor having a base to accept an ac input signal, an emitter connected to the collector the first p-n-p transistor, and a collector;
a second p-n-p transistor having a collector connected to the emitter of the first p-n-p transistor, a base connected to the collector of the first n-p-n transistor, and an emitter connected to a first reference voltage;
a third p-n-p transistor having a collector and base connected to the collector of the first n-p-n transistor, and an emitter connected to the first reference voltage; and,
a current source having an output connected to a second reference voltage having a lower voltage potential than the first reference voltage, and an input connected to the collector of the first p-n-p transistor.
14. The amplifier of claim 13 further comprising:
a first capacitor having a first terminal to accept an unbiased ac input signal and a second terminal connected to the base of the first n-p-n transistor;
a first resistor having a first terminal connected to a third reference voltage having a lower voltage potential than the first reference voltage, and a second terminal connected to the base of the first n-p-n transistor; and,
wherein the base of the first n-p-n transistor accepts a first biased ac input signal.
15. The amplifier of claim 14 wherein the second terminals of the first capacitor and first resistor are connected to the base of the first p-n-p transistor; and,
wherein the base of the first p-n-p transistor accepts the first biased ac input signal.
16. The amplifier of claim 14 further comprising:
a second capacitor having a first terminal to accept the unbiased ac input signal and a second terminal connected to the base of the first p-n-p transistor;
a second resistor having a first terminal connected to a fourth reference voltage having a lower voltage potential than the first reference voltage, and a second terminal connected to the base of the first p-n-p transistor; and,
wherein the base of the first p-n-p transistor accepts a second biased ac input signal.
17. The amplifier of claim 13 further comprising:
a first capacitor having a first terminal to accept an unbiased ac input signal and a second terminal connected to the base of the first p-n-p transistor;
a first resistor having a first terminal connected to a third reference voltage having a lower voltage potential than the first reference voltage, and a second terminal connected to the base of the first p-n-p transistor; and,
wherein the base of the first p-n-p transistor accepts a first biased ac input signal.