IP Library Granted Patent US 8,607,180
Granted Patent B2
US 8,607,180 · App. 13/467,696 · Granted Dec 10, 2013

Multi-pass routing to reduce crosstalk

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,607,180
App. No.
13/467,696
Granted
Dec 10, 2013
Kind
B2
Abstract

An integrated circuit (IC) or a block of an IC is routed. The signals of the netlist to be routed are grouped according the signal properties. A signal property may be the time or clock used to initiate the switching of the signal. The signals of each group are routed successively. This causes the signals of later groups to be routed between the signals of previous groups thereby providing shielding between signals lines of the same group.

Claims (27)

1. A method of routing a block of an integrated circuit, comprising:

grouping a first plurality of signals into at least a second plurality of signals and a third plurality of signals based on a switching property of each of said first plurality of signals, said switching property based on switching activity that varies according to a mode said integrated circuit is operating;

routing, by using at least one computer, said second plurality of signals and not routing said third plurality of signals using a routing algorithm that reduces crosstalk between each of said first plurality of signals by increasing a spacing between routed signal lines to spacing that is greater than a minimum spacing for signals routed next to each other; and,

after routing said second plurality of signal lines and not routing said third plurality of signals, routing, by using at least one computer, said third plurality of signals in said spacing between routed signal lines thereby providing shielding between at least two of said second plurality of signals.

2. The method of claim 1 , wherein said switching property is a functional mode of operation.

3. The method of claim 2 , wherein said functional mode of operation includes a test mode.

4. The method of claim 1 , wherein said second plurality of signals all switch based on a first time reference and said third plurality of signals switch based on a second time reference, the first time reference and the second time reference not switching at the same time.

5. The method of claim 1 , wherein said switching property is that said third plurality of signals are static while said second plurality of signals are switching.

6. The method of claim 1 , further comprising:

after routing said third plurality of signal lines, repeating routing said second plurality of signals and not routing said third plurality of signals; and,

after, repeating routing said second plurality of signals, repeating routing said third plurality of signals.

7. A method of routing a block of an integrated circuit, comprising:

creating a plurality of routing groups, the plurality of routing groups each having a different switching property, said switching property based on switching activity that varies according to a mode said integrated circuit is operating;

routing, by using at least one computer, a first group of the plurality of routing groups and not routing a second group of the plurality of routing groups using a computer executed router algorithm that reduces crosstalk between routed signal lines of said first group by increasing a spacing between routed signal lines of said first to spacing that is greater than a minimum spacing for signals routed next to each other; and,

after routing the first group of the plurality of routing groups and not routing the second group of the plurality of routing groups routing, by using at least one computer executing a router algorithm, the second group of the plurality of routing groups using the spacing between routed signal lines of said first group thereby providing shielding between at least two of said routed signal lines of said first group.

8. The method of claim 7 , wherein said different switching property is a functional mode of operation.

9. The method of claim 8 , wherein said functional mode of operation includes a test mode.

10. The method of claim 7 , wherein said grouping said first group all switch based on a first time reference and said second group switch based on a second time reference, the first time reference and the second time reference not switching at the same time.

11. The method of claim 7 , wherein each group of the plurality of routing groups switches when the other groups of the plurality of routing groups is static.

12. A non-transitory computer readable medium having instructions stored thereon for routing a block of an integrated circuit that, when executed by a computer, at least instruct the computer to:

group a first plurality of signals into at least a second plurality of signals and a third plurality of signals based on a switching property of each of said first plurality of signals, said switching property based on switching activity that varies according to a mode said integrated circuit is operating;

route said second plurality of signals and not routing said third plurality of signals using a routing algorithm that reduces crosstalk between each of said first plurality of signals by increasing a spacing between routed signal to spacing that is greater than a minimum spacing for signals routed next to each other;

after routing said second plurality of signal lines and not routing said third plurality of signals, route said third plurality of signals in said spacing between routed signal lines thereby providing shielding between at least two of said second plurality of signals.

13. The non-transitory computer readable medium of claim 12 , wherein said switching property is a functional mode of operation.

14. The non-transitory computer readable medium of claim 13 , wherein said functional mode of operation includes a test mode.

15. The non-transitory computer readable medium of claim 12 , wherein said second plurality of signals all switch based on a first time reference and said third plurality of signals switch based on a second time reference, the first time reference and the second time reference not switching at the same time.

16. The non-transitory computer readable medium of claim 12 , wherein said switching property is that said third plurality of signals are static while said second plurality of signals are switching.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0223 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044887/0109 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2012
From: SONI, ANUJ
To: LSI CORPORATION
Reel/Frame 028216/0886 →