Batch fabricated microconnectors
View Patent ↗Connectors and interconnects for high power connectors which may operate at frequencies up to approximately 110 GHz and fabrication methods thereof are provided.
1. A multilayer microconnector structure formed by a multilayer additive build process, comprising:
a base layer having first and second opposing surfaces and having a plurality of vias extending therebetween;
a conductive material disposed within the vias and configured to provide electrical communication between the first and second surfaces;
a first layer of conductor material disposed over the base layer at the first surface, the conductive layer comprising a plurality of electrically isolated upper conductive connector portions, each upper connector portion disposed in electrical communication with the conductive material of a respective via; and
a second layer of conductor material disposed over the base layer at the second surface, the second conductive layer comprising a plurality of electrically isolated conductive lower connector portions, each lower connector portion disposed in electrical communication with the conductive material of a respective via, wherein the upper and lower conductor portions are structured to provide a microconnector.
2. The multilayer microconnector structure according to claim 1 , wherein the base layer comprises a ceramic wafer.
3. The multilayer microconnector structure according to claim 1 , wherein the base layer comprises a dielectric.
4. The multilayer microconnector structure according to claim 1 , wherein the base layer comprises a patterned dielectric.
5. The multilayer microconnector structure according to claim 1 , comprising a substrate, wherein the first layer of conductor material, base layer, and second layer of conductor material are disposed over the substrate.
6. The multilayer microconnector structure according to claim 1 , wherein the upper conductive connector portions comprise a center conductor and an outer conductor disposed about the center conductor.
7. The multilayer microconnector structure according to claim 6 , wherein the center and outer conductors form a coaxial connector.
8. The multilayer microconnector structure according to claim 6 , wherein the center conductor comprises a male connector.
9. The multilayer microconnector structure according to claim 6 , wherein the center conductor comprises a female connector.
10. The multilayer microconnector structure according to claim 6 , wherein the lower conductive connector portions comprise a center conductor and an outer conductor disposed about the center conductor.
11. The multilayer microconnector structure according to claim 1 , wherein at least one of the upper conductive connector portions comprises a blindmate interconnect.
12. The multilayer microconnector structure according to claim 11 , wherein at least one of the lower conductive connector portions comprises a blindmate interconnect.
13. The multilayer microconnector structure according to claim 1 , wherein at least one of the upper conductive connector portions comprises a flexure disposed along a length of the at least one upper conductive connector portion.
14. The multilayer microconnector structure according to claim 13 , wherein the flexure comprises a split-tube construction.
15. The multilayer microconnector structure according to claim 1 , wherein at least one of the lower conductive connector portions comprises a mounting foot.
16. The multilayer microconnector structure according to claim 1 , comprising a flexure disposed proximate a base portion of a selected one of the upper conductor portions to permit tilting of the selected one of the upper conductor portions.
17. The multilayer microconnector structure according to claim 16 , wherein the flexure comprises a gimbal.
18. The multilayer microconnector structure according to claim 1 , wherein the conductive material disposed within the vias comprises a metal plug that fills the vias.
19. The multilayer microconnector structure according to claim 1 , wherein the conductive material disposed within the vias comprises a metallization of the surface of the vias.
20. The multilayer microconnector structure according to claim 1 , wherein the upper conductive connector portions comprise a base material having a metal disposed over the base material.
21. The multilayer microconnector structure according to claim 20 , wherein the base material comprises one or more of Cu, Ni, Be:Cu, and NiCo.
22. The multilayer microconnector structure according to claim 20 , wherein the metal disposed over the base material comprises one or more of Cu/Pd/Au, Ni/Au, and Ni/Ag/Au.
23. The multilayer microconnector structure according to claim 1 , wherein the upper and lower conductor portions are structured to provide an array of microconnectors.
24. A method for forming a multilayer microconnector structure, comprising:
depositing a plurality of layers, wherein the layers comprise one or more of a metal material, a sacrificial mold material, and a dielectric material, thereby forming a multilayer microconnector structure comprising:
a base layer having first and second opposing surfaces and having a plurality of vias extending therebetween;
a conductive material disposed within the vias and configured to provide electrical communication between the first and second surfaces;
a first layer of conductor material disposed over the base layer at the first surface, the conductive layer comprising a plurality of electrically isolated upper conductive connector portions, each upper connector portion disposed in electrical communication with the conductive material of a respective via; and
a second layer of conductor material disposed over the base layer at the second surface, the second conductive layer comprising a plurality of electrically isolated conductive lower connector portions, each lower connector portion disposed in electrical communication with the conductive material of a respective via, wherein the upper and lower conductor portions are structured to provide a microconnector.
25. The method according to claim 24 , wherein the base layer comprises a ceramic wafer.
26. The method according to claim 24 , wherein the base layer comprises a dielectric.
27. The method according to claim 24 , wherein the base layer comprises a patterned dielectric.
28. The method according to claim 24 , comprising a providing a substrate and depositing the first layer of conductor material, base layer, and the second layer of conductor material are disposed over the substrate.
29. The method according to claim 28 , comprising removing the first layer of conductor material, base layer, and the second layer of conductor material from the substrate to provide a freestanding multilayer microconnector structure.
30. The method according to claim 24 , wherein the upper conductive connector portions comprise a center conductor and an outer conductor disposed about the center conductor.
31. The method according to claim 30 , wherein the center and outer conductors form a coaxial connector.
32. The method according to claim 30 , wherein the center conductor comprises a male connector.
33. The method according to claim 30 , wherein the center conductor comprises a female connector.
34. The method according to claim 30 , wherein the lower conductive connector portions comprise a center conductor and an outer conductor disposed about the center conductor.
35. The method according to claim 24 , wherein at least one of the upper conductive connector portions comprises a blindmate interconnect.
36. The method according to claim 35 , wherein at least one of the lower conductive connector portions comprises a blindmate interconnect.
37. The method according to claim 24 , wherein at least one of the upper conductive connector portions comprises a flexure disposed along a length of the at least one upper conductive connector portion.
38. The method according to claim 37 , wherein the flexure comprises a split-tube construction.
39. The method according to claim 24 , wherein at least one of the lower conductive connector portions comprises a mounting foot.
40. The method according to claim 24 , comprising a flexure disposed proximate a base portion of a selected one of the upper conductor portions to permit tilting of the selected one of the upper conductor portions.
41. The method according to claim 40 , wherein the flexure comprises a gimbal.
42. The method according to claim 24 , wherein the conductive material disposed within the vias comprises a metal plug that fills the vias.
43. The method according to claim 24 , wherein the conductive material disposed within the vias comprises a metallization of the surface of the vias.
44. The method according to claim 24 , wherein the upper conductive connector portions comprise a base material having a metal disposed over the base material.
45. The method according to claim 44 , wherein the base material comprises one or more of Cu, Ni, Be:Cu, and NiCo.
46. The method according to claim 44 , wherein the metal disposed over the base material comprises one or more of Cu/Pd/Au, Ni/Au, and Ni/Ag/Au.
47. The method according to claim 24 , wherein the upper and lower conductor portions are structured to provide an array of microconnectors.
48. A dilation for providing transition between a first array of a first pitch at a first surface of the dilation to a second array of a second pitch at a second surface thereof, the first pitch being greater than the second pitch, the dilation comprising coaxial transmission lines extending within the dilation, each line extending from a respective element of the first array to a respective element of the second array.
49. The dilation array according to claim 48 , wherein the coaxial transmission lines comprise 3D-RF routing.
50. The dilation array according to claim 48 , wherein the dilation comprises a monolithic part.
51. The dilation array according to claim 48 , comprising a plurality of connectors at the first and second surfaces, each connector associated with a respective array element.
52. A method of forming a dilation by a sequential build process, comprising:
providing a plurality of layers, wherein the layers comprise one or more layers of a conductive material and one or more layers of a sacrificial material, the plurality of layers collectively providing a dilation for providing transition between a first array of a first pitch at a first surface of the dilation to a second array of a second pitch at a second surface thereof, the first pitch being greater than the second pitch, the dilation comprising coaxial transmission lines extending within the dilation, each line extending from a respective element of the first array to a respective element of the second array.
53. The method of claim 52 , wherein the coaxial transmission lines comprise 3D-RF routing.
54. The multilayer microconnector structure according to claim 1 , wherein each upper connector portion is electrically connected by a respective via to a respective lower connector portion to provide a plurality of discrete, electrically isolated microconnectors.
55. The method of claim 24 , wherein each upper connector portion is electrically connected by a respective via to a respective lower connector portion to provide a plurality of discrete, electrically isolated microconnectors.