Tunnel field effect transistor
View Patent ↗An FET device characterized as being an asymmetrical tunnel FET (TFET) is disclosed. The TFET includes a gate-stack, a channel region underneath the gate-stack, a first and a second junction adjoining the gate-stack and being capable for electrical continuity with the channel. The first junction and the second junction are of different conductivity types. The TFET also includes spacer formations in a manner that the spacer formation on one side of the gate-stack is thinner than on the other side.
1. An FET device, comprising:
a gatestack having a first side and a second side;
a channel region underneath said gatestack, wherein said gatestack is capable to induce a conductive channel is said channel region;
a first and a second junction, adjoining said gatestack on its respective sides and being capable for electrical continuity with said conductive channel, wherein said first junction and said second junction are of different conductivity types;
spacer formations over said first side and over said second side of said gatestack, wherein said spacer formation over said first side is thinner than said spacer formation over said second side; and
wherein said first junction, said second junction, and said channel region are of SiGe, and wherein said FET device is characterized as being an asymmetrical tunnel FET device (TFET).
2. The FET device of claim 1 , wherein said first junction is characterized as being a raised junction.
3. The FET device of claim 1 , wherein said first junction is of a p-type conductivity.
4. The FET device of claim 1 , wherein said first junction is of an n-type conductivity.
5. The FET device of claim 1 , wherein said gatestack has a gate-length, and said gate-length is between 40 nm and 10 nm.
6. The FET device of claim 5 , wherein said FET device is further characterized as being a metal gate device.
7. The FET device of claim 1 , wherein said FET device is further characterized as being a polysilicon gate device.