Nitride semiconductor template and light-emitting diode including oxygen-doped layer and silicon-doped layer formed on the oxygen-doped layer
View Patent ↗A nitride semiconductor template includes a substrate, and a group III nitride semiconductor layer having an oxygen-doped layer formed on the substrate, and a silicon-doped layer formed on the oxygen-doped layer. A total thickness of the group III nitride semiconductor layer is not smaller than 4 μm and not greater than 10 μm, and an average silicon carrier concentration in the silicon-doped layer is not lower than 1×10 18 cm −3 and not higher than 5×10 18 cm −3 .
1. A nitride semiconductor template, comprising:
a substrate; and
a group III nitride semiconductor layer comprising an oxygen-doped layer formed on the substrate, and a silicon-doped layer formed on the oxygen-doped layer,
wherein a total thickness of the group III nitride semiconductor layer is not smaller than 4 μm and not greater than 10 μm, and
wherein an average silicon carrier concentration in the silicon-doped layer is not lower than 1×10 18 cm −3 and not higher than 5×10 18 cm −3 .
2. The nitride semiconductor template according to claim 1 , wherein an oxygen impurity concentration in the oxygen-doped layer is not lower than 1×10 16 cm −3 and not higher than 3×10 19 cm −3 , and an average carrier concentration in the oxygen-doped layer is not lower than 0.8×10 18 cm −3 and not higher than 1×10 18 cm −3 .
3. The nitride semiconductor template according to claim 1 , wherein a surface resistivity is not less than 10 Ω/sq and not more than 20 Ω/sq.
4. The nitride semiconductor template according to claim 1 , wherein a full width at half maximum of a (0004) plane of X-ray diffraction is not less than 50 seconds and not more than 100 seconds.
5. The nitride semiconductor template according to claim 1 , wherein the group III nitride semiconductor layer comprises a GaN-based layer.
6. The nitride semiconductor template according to claim 5 , further comprising an aluminum nitride buffer layer between the GaN-based layer and the substrate.
7. The nitride semiconductor template according to claim 6 , wherein a thickness of the aluminum nitride buffer layer is not less than 10 nm and not more than 100 nm.
8. The nitride semiconductor template according to claim 1 , wherein a surface of the substrate comprises a plurality of protrusions.
9. The nitride semiconductor template according to claim 1 , wherein the group III nitride semiconductor layer is grown by Hydride Vapor Phase Epitaxy.
10. A light-emitting diode, comprising:
a sapphire substrate;
an aluminum nitride buffer layer formed on the sapphire substrate;
an n-type group III nitride semiconductor layer formed on the aluminum nitride buffer layer;
a multiple quantum well layer formed on the n-type group III nitride semiconductor layer;
a p-type nitride semiconductor layer formed on the multiple quantum well layer;
an exposed portion of the n-type group III nitride semiconductor layer formed by etching from the p-type nitride semiconductor layer to the n-type group III nitride semiconductor layer;
an n-type electrode formed on the exposed portion of the n-type group III nitride semiconductor layer; and
a p-type electrode formed on the p-type nitride semiconductor layer,
wherein the n-type group III nitride semiconductor layer comprises a stacked structure comprising an oxygen-doped layer formed on the aluminum nitride buffer layer, and a silicon-doped layer formed on the oxygen-doped layer,
wherein a total thickness of the group III nitride semiconductor layer is not smaller than 4 μm and not greater than 10 μm, and
wherein an average silicon carrier concentration in the silicon-doped layer is not lower than 1×10 18 cm −3 and not higher than 5×10 18 cm −3 .
11. The nitride semiconductor template according to claim 1 , wherein an n-type electrode is disposed on an exposed portion of the group III nitride semiconductor layer.
12. The nitride semiconductor template according to claim 1 , wherein an upper surface of the group III nitride semiconductor layer comprises an etched portion.
13. The nitride semiconductor template according to claim 1 , wherein the total thickness of the group III nitride semiconductor layer includes a sum of a thickness of the oxygen-doped layer and a thickness of the silicon-doped layer formed on the oxygen-doped layer.
14. The nitride semiconductor template according to claim 13 , wherein the total thickness of the group III nitride semiconductor layer is in a range from 5 μm to 9 μm.
15. The nitride semiconductor template according to claim 13 , wherein an oxygen impurity concentration in the oxygen-doped layer is in a range from 0.9×10 18 cm −3 to 3×10 19 cm −3 , and the average silicon carrier concentration in the silicon-doped layer is in a range from 1×10 18 cm −3 to 4×10 18 cm −3 .
16. The light-emitting diode according to claim 10 , wherein a surface of the substrate comprises a plurality of protrusions.
17. The light-emitting diode according to claim 10 , wherein the total thickness of the n-type group III nitride semiconductor layer includes a sum of a thickness of the oxygen-doped layer and a thickness of the silicon-doped layer formed on the oxygen-doped layer.
18. The light-emitting diode according to claim 17 , wherein the total thickness of the group III nitride semiconductor layer is in a range from 5 μm to 9 μm.
19. The light-emitting diode according to claim 10 , wherein the total thickness of the group III nitride semiconductor layer is in a range from 5 μm to 9 μm.
20. The light-emitting diode according to claim 10 , wherein an oxygen impurity concentration in the oxygen-doped layer is in a range from 0.9×10 18 cm −3 to 3×10 19 cm −3 , and the average silicon carrier concentration in the silicon-doped layer is in a range from 1×10 18 cm −3 to 4×10 18 cm −3 .