IP Library Granted Patent US 8,659,167
Granted Patent B1
US 8,659,167 · App. 13/597,824 · Granted Feb 25, 2014

Sensor packaging method and sensor packages

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Quick Facts
Patent No.
US 8,659,167
App. No.
13/597,824
Granted
Feb 25, 2014
Kind
B1
Abstract

A method ( 80 ) entails providing ( 82 ) a structure ( 117 ), providing ( 100 ) a controller element ( 102, 24 ), and bonding ( 116 ) the controller element to an outer surface ( 52, 64 ) of the structure. The structure includes a sensor wafer ( 92 ) and a cap wafer ( 94 ). Inner surfaces ( 34, 36 ) of the wafers ( 92, 94 ) are coupled together, with sensors ( 30 ) interposed between the wafers. One wafer ( 94, 92 ) includes a substrate portion ( 40, 76 ) with bond pads ( 42 ) formed on its inner surface ( 34, 36 ). The other wafer ( 94, 92 ) conceals the substrate portion ( 40, 76 ). After bonding, methodology ( 80 ) entails forming ( 120 ) conductive elements ( 60 ) on the element ( 102, 24 ), removing ( 126 ) material sections ( 96, 98, 107 ) from the wafers to expose the bond pads, forming ( 130 ) electrical interconnects ( 56 ), applying ( 134 ) packaging material ( 64 ), and singulating ( 138 ) to produce sensor packages ( 20, 70 ).

Claims (47)

1. A method of forming a sensor package comprising:

bonding a sensor wafer, a cap wafer, and at least one controller element together such that a first inner surface of said cap wafer is coupled to a second inner surface of said sensor wafer to form a sensor structure and a bottom side of said at least one controller element is coupled to an outer surface of said sensor structure to form a stacked wafer structure, wherein said sensor wafer includes a plurality of sensors encapsulated by said cap wafer, a first one of said cap wafer and said sensor wafer includes a substrate portion with first bond pads located on a corresponding one of said first and second inner surfaces and a second one of said cap wafer and said sensor wafer conceals said substrate portion, and a top side of said at least one controller element includes control circuitry and second bond pads;

removing a first material section from said second one of said sensor wafer and said cap wafer to expose said substrate portion having said first bond pads;

forming electrical interconnects between said first and second bond pads; and

singulating said stacked wafer structure to produce said sensor package.

2. A method as claimed in claim 1 wherein said bonding operation comprises:

bonding said first inner surface of said cap wafer with said second inner surface of said sensor wafer to form said sensor structure; and

following said bonding of said cap wafer and said sensor wafer, bonding said bottom side of said at least one controller element with said outer surface of said sensor structure to form said stacked wafer structure.

3. A method as claimed in claim 1 wherein said at least one controller element is in the form of a controller wafer having said top side and said bottom side, said top side including a plurality of controller dies, each of said controller dies having said control circuitry and said second bond pads, and wherein:

said bonding operation comprises attaching said bottom side of said controller wafer to said outer surface of said sensor structure such that said each of said controller dies is aligned with one of said sensors; and

said removing operation includes removing a second material section of said controller wafer coinciding with said first material section to expose said substrate portion having said first bond pads.

4. A method as claimed in claim 3 wherein:

for said each of said controller dies aligned with said one of said sensors, said forming operation forms said electrical interconnects between said first and second bond pads; and

said singulating operation is performed following said forming operation to produce a plurality of sensor packages, said sensor package being one of said plurality of sensor packages.

5. A method as claimed in claim 1 wherein said at least one controller element includes a plurality of separate controller dies that are physically detached from one another, each of said separate controller dies having said top side and said bottom side, said top side including said control circuitry and said second bond pads, and said bonding operation comprises attaching said bottom side of each of said separate controller dies to said outer surface of said sensor structure such that said each of said controller dies is aligned with one of said sensors.

6. A method as claimed in claim 5 wherein:

for said each of said controller dies aligned with said one of said sensors, said forming operation forms said electrical interconnects between said first and second bond pads; and

said singulating operation is performed following said forming operation to produce a plurality of sensor packages, said sensor package being one of said plurality of sensor packages.

7. A method as claimed in claim 1 wherein said outer surface of said sensor structure is a second outer surface of said sensor wafer, and said bonding operation comprises attaching said bottom side of said at least one controller element to said second outer surface of said sensor wafer to produce said stacked wafer structure having said sensor wafer positioned between said cap wafer and said at least one controller element.

8. A method as claimed in claim 1 wherein said outer surface of said sensor structure is a first outer surface of said cap wafer, and said bonding operation comprises attaching said bottom side of said at least one controller element to said first outer surface of said cap wafer to produce said stacked wafer structure having said cap wafer positioned between said sensor wafer and said at least one controller element.

9. A method as claimed in claim 1 wherein said at least one controller element includes bump pads formed on said top side, and said method further comprises forming conductive elements on said bump pads following said bonding operation.

10. A method as claimed in claim 1 wherein said removing operation is performed following said bonding operation.

11. A method as claimed in claim 1 further comprising:

applying a packaging material over said top side of said at least one controller element to encapsulate said control circuitry and said electrical interconnects; and

performing said singulating operation following said applying operation.

12. A method as claimed in claim 1 further comprising mounting a sensor die on said top side of said at least one controller element following said bonding operation.

13. A method of forming a sensor package comprising:

bonding a sensor wafer, a cap wafer, and at least one controller element together such that a first inner surface of said cap wafer is coupled to a second inner surface of said sensor wafer to form a sensor structure and a bottom side of said at least one controller element is coupled to an outer surface of said sensor structure to form a stacked wafer structure, wherein said sensor wafer includes a plurality of sensors encapsulated by said cap wafer, a first one of said cap wafer and said sensor wafer includes a substrate portion with first bond pads located on a corresponding one of said first and second inner surfaces and a second one of said cap wafer and said sensor wafer conceals said substrate portion, and a top side of said at least one controller element includes control circuitry and second bond pads;

removing a first material section from said second one of said sensor wafer and said cap wafer to expose said substrate portion having said first bond pads;

forming electrical interconnects between said first and second bond pads following said bonding and removing operations;

applying a packaging material over said top side of said at least one controller element to encapsulate said control circuitry and said electrical interconnects; and

following said applying operation, singulating said stacked wafer structure to produce said sensor package.

14. A method as claimed in claim 13 wherein said removing operation is performed following said bonding operation.

15. A method of forming a sensor package comprising:

bonding a sensor wafer, a cap wafer, and at least one controller element together such that a first inner surface of said cap wafer is coupled to a second inner surface of said sensor wafer to form a sensor structure and a bottom side of said at least one controller element is coupled to an outer surface of said sensor structure to form a stacked wafer structure, wherein said sensor wafer includes a plurality of sensors encapsulated by said cap wafer, a first one of said cap wafer and said sensor wafer includes a substrate portion with first bond pads located on a corresponding one of said first and second inner surfaces and a second one of said cap wafer and said sensor wafer conceals said substrate portion, and a top side of said at least one controller element includes control circuitry and second bond pads, wherein said bonding operation comprises:

bonding said first inner surface of said cap wafer with said second inner surface of said sensor wafer to form said sensor structure; and

following said bonding of said cap wafer and said sensor wafer, bonding said bottom side of said at least one controller element with said outer surface of said sensor structure to form said stacked wafer structure;

following said bonding operation, removing a first material section from said second one of said sensor wafer and said cap wafer to expose said substrate portion having said first bond pads;

forming electrical interconnects between said first and second bond pads; and

singulating said stacked wafer structure to produce said sensor package.

16. A method as claimed in claim 15 wherein said at least one controller element is in the form of a controller wafer having said top side and said bottom side, said top side including a plurality of controller dies, each of said controller dies having said control circuitry and said second bond pads, and wherein:

said bonding operation comprises attaching said bottom side of said controller wafer to said outer surface of said sensor structure such that said each of said controller dies is aligned with one of said sensors; and

said removing operation includes removing a second material section of said controller wafer coinciding with said first material section to expose said substrate portion having said first bond pads.

17. A method as claimed in claim 15 wherein said at least one controller element includes a plurality of separate controller dies that are physically detached from one another, each of said separate controller dies having said top side and said bottom side, said top side including said control circuitry and said second bond pads, and said bonding operation comprises attaching said bottom side of each of said separate controller dies to said outer surface of said sensor structure such that said each of said controller dies is aligned with one of said sensors.

18. A method as claimed in claim 15 wherein said outer surface of said sensor structure is a second outer surface of said sensor wafer, and said bonding operation comprises attaching said bottom side of said at least one controller element to said second outer surface of said sensor wafer to produce said stacked wafer structure having said sensor wafer positioned between said cap wafer and said at least one controller element.

19. A method as claimed in claim 15 wherein said outer surface of said sensor structure is a first outer surface of said cap wafer, and said bonding operation comprises attaching said bottom side of said at least one controller element to said first outer surface of said cap wafer to produce said stacked wafer structure having said cap wafer positioned between said sensor wafer and said at least one controller element.

20. A method as claimed in claim 15 wherein said at least one controller element includes bump pads formed on said top side, and said method further comprises forming conductive elements on said bump pads following said bonding operation.

Assignments (32)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2026
From: NXP USA, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 075220/0239 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0614 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0633 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0652 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Apr 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030256/0625 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Apr 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030256/0544 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Apr 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030256/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2012
From: BOWLES, PHILIP H.; HOLM, PAIGE M.; HOOPER, STEPHEN R.; ROOP, RAYMOND M.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 028869/0491 →