Semiconductor devices with non-implanted barrier regions and methods of fabricating same
View Patent ↗An electronic device includes a silicon carbide layer including an n-type drift region therein, a contact forming a Schottky junction with the drift region, and a p-type junction barrier region on the silicon carbide layer. The p-type junction barrier region includes a p-type polysilicon region forming a P-N heterojunction with the drift region, and the p-type junction barrier region is electrically connected to the contact.
1. An electronic device comprising:
a silicon carbide layer including an n-type drift region therein;
a contact forming a Schottky junction with the drift region; and
a p-type junction barrier region on the silicon carbide layer;
wherein the p-type junction barrier region comprises a p-type polysilicon region forming a P-N heterojunction with the drift region;
wherein the p-type junction barrier region is electrically connected to the contact;
the electronic device further comprising:
a plurality of guard rings at a surface of the silicon carbide layer laterally adjacent to the contact, wherein the plurality of guard rings comprise a plurality of second p-type polysilicon regions on the drift region, the second p-type polysilicon regions being electrically isolated from the contact under zero bias conditions; and
a junction termination region at the surface of the silicon carbide layer having a conductivity type opposite the conductivity type of the drift region;
wherein the plurality of second p-type polysilicon regions contact the junction termination region.
2. The electronic device of claim 1 , wherein the Schottky junction between the contact and the drift region is configured to turn on at a lower forward voltage than the P-N heterojunction between the junction barrier region and the drift region.
3. The electronic device of claim 1 , wherein the contact forms an ohmic contact to the p-type polysilicon region; and
wherein the P-N heterojunction between the p-type junction harrier region and the drift region is configured to begin to conduct majority carriers at a higher forward voltage than a turn on voltage of the Schottky junction.
4. An electronic device comprising
a silicon carbide layer including an n-type drift region therein;
a contact forming a Schottky junction with the drift region; and
p-type junction barrier region on the silicon carbide layer;
wherein the p-type junction barrier region comprises a p-type polysilicon region forming a P-N heterojunction with the drift region; and
wherein the p-type junction barrier region is electrically connected to the contact;
the electronic device further comprising:
a guard ring termination region at a surface of the silicon carbide layer laterally adjacent to the contact, wherein the guard ring termination region comprises a second p-type polysilicon region on the drift region, the second p-type polysilicon region being electrically isolated from the contact under zero bias conditions and forming a p-n heterojunction with the drift region.
5. The electronic device of claim 1 , wherein the junction barrier region comprises a plurality of p-type polysilicon regions in the drift region and a p-type polysilicon minority injector pad in the drift region beneath the contact and electrically connected to the contact.
6. The electronic device of claim 5 , wherein the minority injector pad has a surface area in a horizontal plane parallel to a major surface of the silicon carbide layer that is larger than a surface area in the horizontal plane of one of the plurality of p-type polysilicon regions in the junction barrier region.
7. The electronic device of claim 5 , wherein the minority carrier injector pad has a surface area in a horizontal plane parallel, to a major surface of the silicon carbide layer that is at least about 10% of a surface area of the drift region in the horizontal plane below the contact.
8. The electronic device of claim 1 , farther comprising;
an n+ silicon carbide contact layer on the drift region opposite the contact; and a second contact on the contact layer.
9. An electronic device comprising:
a drift region having a first conductivity type;
a contact forming a metal-semiconductor junction with the drift region; and
a junction barrier region on the drift region;
a guard ring termination region on the drift region and laterally adjacent to the metal-semiconductor junction;
wherein the junction barrier region has a second conductivity type opposite the first conductivity type and comprises a heterojunction barrier region on the drift region;
wherein the heterojunction barrier region forms a P-N heterojunction with the drift region and is in electrical contact with the contact;
wherein the drill region comprises n-type silicon carbide and the heterojunction barrier region comprises p-type gallium nitride; and
wherein the guard ring termination region comprises a second heterojunction barrier region.
10. The electronic device of claim 9 , wherein the metal-semiconductor junction between the contact and the drift region is configured to turn on at a lower forward voltage than the P-N heterojunction between the heterojunction barrier region and the drill region.
11. The electronic device of claim 9 , wherein the contact forms an ohmic contact to the heterojunction harrier region; and
wherein the P-N heterojunction between the heterojunction barrier region and the drill region is configured to begin to conduct majority carriers at a higher forward voltage than a turn on voltage of the metal-semiconductor junction and at a lower voltage at which the P-N heterojunction between the heterojunction barrier region and the drift region begins to inject minority carriers into the drift region.
12. The electronic device of claim 9 , wherein the heterojunction barrier region comprises a plurality of p-type gallium nitride regions on the drift region and at least one p-type gallium nitride minority injector pad on the drift region beneath the contact and electrically connected to the contact.
13. The electronic device of claim 12 , wherein the minority carrier injection pad has a width that is greater than a width of the junction barrier region.
14. The electronic device of claim 12 , wherein the minority injector pad has a horizontal surface area that is larger than a horizontal surface area of one of the plurality of p-type gallium nitride regions in the junction barrier region.
15. The electronic device of claim 9 , further comprising:
a termination region at a surface of the drift region and defining an active region of the device within the termination region;
wherein a ratio of a surface area of the active region occupied by the heterojunction barrier regions to a total surface area of the active region is about 2% to about 40%.
16. The electronic device of claim 15 , wherein the ratio of the surface area of the active region occupied by the heterojunction barrier regions to the total surface area of the active region is about 4% to about 30%.
17. The electronic device of claim 15 , wherein the ratio of the surface area of the active region occupied by the heterojunction barrier regions to the total surface area of the active region is about 10% to about 30%.
18. The electronic device of claim 15 , wherein the ratio of the surface area of the active region occupied by the heterojunction barrier regions to the total surface area of the active region is about 20% to about 30%.
19. An electronic device comprising:
a silicon carbide layer comprising a drift region having a first conductivity type;
a contact on a surface of the drift region and forming a Schottky junction with the drift region; and
a guard ring in contact with the surface of the silicon carbide layer adjacent to the Schottky junction;
wherein the guard ring has a conductivity type opposite the conductivity type of the drift region and comprises a material that forms a hetero junction with the drift region; and
wherein the guard ring comprises polysilicon and/or gallium nitride.
20. An electronic device comprising:
a drift region, having a first conductivity type;
a contact forming a metal-semiconductor junction with the drift region; and
a guard ring on the drift region and laterally adjacent to the metal-semiconductor junction, the guard ring having a second conductivity type opposite the first conductivity type;
wherein the guard ring comprises a semiconductor material that forms a P-N heterojunction with the drift region.
21. The electronic device of claim 20 , wherein the guard ring comprises doped polysilicon.
22. The electronic device of claim 20 , further comprising;
a junction barrier region having the second conductivity type on the drift region;
wherein the junction barrier region comprises a heterojunction barrier region on the drift region; and wherein the heterojunction barrier region forms a P-N heterojunction with the drift region and is in electrical contact with the contact.
23. The electronic device of claim 22 , wherein the metal-semiconductor junction between the contact and the drift region is configured to turn on at a lower forward voltage than the P-N heterojunction between the heterojunction barrier region and the drift region.
24. The electronic device of claim 22 , wherein the contact forms an ohmic contact to the heterojunction barrier region; and
wherein the P-N heterojunction between the heterojunction barrier region and the drift region is configured to begin to conduct majority carriers at a higher forward voltage than a turn on voltage of the metal-semiconductor junction and at a lower voltage at which the P-N heterojunction between the heterojunction barrier region and the drift region begins to inject minority carriers into the drift region.
25. The electronic device of claim 22 , wherein the heterojunction barrier region comprises a plurality of p-type polysilicon regions on the drift region and at least one type polysilicon polysilicon minority injector pad on the drift region beneath the contact and electrically connected to the contact.