Electronic package with embedded materials in a molded structure to control warpage and stress
View Patent ↗A method and system are provided for an electronic package with embedded materials in a molded structure to control warpage and stress. A first material can be deposited on a substrate with a semiconductor die. The substrate can be a coreless substrate. The substrate with the semiconductor die can be placed in a mold tool that when closed defines a space about the semiconductor die. A second material, such as an epoxy mold compound, for example, can be applied to the defined space to produce a mold cap in which the first material is at least partially embedded in the second material. The first and second materials can have a different modulus and/or coefficient of thermal expansion. The first material can be used to cover electrical components on a surface of the substrate. In some instances, more than one material can be at least partially embedded in the second material.
1. A method, comprising:
disposing a first material on a first portion of a surface of a substrate, the substrate having a semiconductor die disposed on a second portion of the surface different from the first portion, wherein the semiconductor die is not in contact with the first material;
placing the substrate in a mold tool;
closing the mold tool to define a space about the semiconductor die;
applying a flexible die seal to a surface of the semiconductor die such that the flexible die seal bulges adjacent to the semiconductor die; and
applying a second material to at least a portion of the defined space to produce a mold cap comprising an undercut formed in a top surface of the mold cap opposite a bottom surface that is in contact with the substrate, wherein the first material is at least partially embedded in the second material.
2. The method of claim 1 , wherein the first material has a modulus with a value that is lower than a value of a modulus of the second material.
3. The method of claim 1 , wherein the second material includes an epoxy mold compound.
4. The method of claim 1 , wherein a coefficient of thermal expansion (CTE) of the first material is different from a CTE of the second material.
5. The method of claim 1 , wherein the bulge in the flexible die seal produces the undercut on the top surface of the mold cap adjacent to the semiconductor die.
6. The method of claim 1 , wherein the substrate includes a coreless substrate.
7. The method of claim 1 , wherein the first portion of the surface of the substrate includes one or more electrical components, the method comprising covering at least a portion of the one or more electrical components with the first material.
8. The method of claim 1 , wherein the one or more electrical components include passive electrical components.
9. A method, comprising:
disposing a plurality of materials on a first portion of a surface of a substrate, the substrate having a semiconductor die disposed on a second portion of the surface different from the first portion, wherein the semiconductor die is not in contact with the plurality of materials;
placing the substrate in a mold tool;
closing the mold tool to define a space about the semiconductor die;
applying a flexible die seal to a surface of the semiconductor die such that the flexible die seal bulges adjacent to the semiconductor die; and
applying a molding material to at least a portion of the defined space to produce a mold cap comprising an undercut formed in a top surface of the mold cap opposite a bottom surface that is in contact with the substrate, wherein the plurality of materials are at least partially embedded in the molding material.
10. The method of claim 9 , wherein the molding material has a modulus with a value that is higher than a value of a modulus of each of the plurality of materials.
11. The method of claim 9 , wherein the molding material includes an epoxy mold compound.
12. The method of claim 9 , wherein a coefficient of thermal expansion (CTE) of each of the plurality of materials is different from a CTE of the molding material.
13. The method of claim 9 , wherein the bulge in the flexible die seal produces the undercut on the top surface of the mold cap adjacent to the semiconductor die.
14. The method of claim 9 , wherein the substrate includes a coreless substrate.
15. The method of claim 9 , wherein the first portion of the surface of the substrate includes one or more electrical components, the method comprising covering at least a portion of the one or more electrical components with the plurality of materials.
16. The method of claim 9 , wherein the one or more electrical components include passive electrical components.