IP Library Granted Patent US 8,981,534
Granted Patent B2
US 8,981,534 · App. 13/616,415 · Granted Mar 17, 2015

Pre-cutting a back side of a silicon substrate for growing better III-V group compound layer on a front side of the substrate

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Quick Facts
Patent No.
US 8,981,534
App. No.
13/616,415
Granted
Mar 17, 2015
Kind
B2
Abstract

The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).

Claims (41)

1. A device, comprising:

a substrate having a first surface and a second surface opposite the first surface, the substrate consisting of a silicon substrate, wherein the substrate contains a plurality of recesses that extend from the second surface toward the first surface, and wherein the plurality of recesses are arranged so that the second surface of the substrate has a predefined pattern from a top view;

a lattice-buffer layer formed on the first surface of the substrate, the lattice-buffer layer containing a material that reduces a lattice mismatch between a III-V group compound material and the silicon substrate or the silicon carbide substrate; and

a III-V group compound layer formed over the lattice-buffer layer, wherein the III-V group compound layer and the lattice-buffer layer have different material compositions.

2. The device of claim 1 , wherein the III-V group compound layer is a part of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).

3. The device of claim 1 , wherein the recesses have substantially identical shapes or sizes.

4. The device of claim 1 , wherein the predefined pattern is one of: a crisscrossing rectangles pattern, a crisscrossing triangles pattern, a concentric circles pattern, a multiple-holes pattern, a multiple-rods pattern, and a radial pattern.

5. The device of claim 1 , wherein the recesses include elongate trenches each having a trench width from about 10 microns to about 100 microns.

6. The device of claim 1 , wherein the lattice-buffer layer contains at least one of: AlN and AlGaN.

7. The device of claim 1 , wherein a distance from bottom surfaces of the recesses to the first surface of the substrate is in a range from about 100 microns to about 300 microns.

8. The device of claim 1 , wherein the III-V group compound layer is a first III-V group compound layer and has a first type of conductivity, and wherein the device further comprises:

a light-emitting layer disposed over the first III-V group compound layer;

a second III-V group compound layer disposed over the light-emitting layer, the second III-V group compound layer having a second type of conductivity different from the first type;

a first conductive contact disposed on the first III-V group compound layer; and

a second conductive contact disposed on the second III-V group compound layer.

9. An apparatus, comprising:

a silicon substrate having a front side a back side opposite the front side, wherein the silicon substrate consists of silicon and includes a plurality of openings formed from the back side of the silicon substrate, and wherein the openings collectively define a pattern on the back side of the silicon substrate from a planar view

a lattice-buffer layer formed on the front side of the silicon substrate, the lattice-buffer layer containing a material that reduces a lattice mismatch between a III-V group compound material and the silicon substrate; and

a III-V group compound layer containing the III-V group compound material formed over the front side of the silicon substrate, wherein the III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).

10. The apparatus of claim 9 , wherein the openings have substantially similar shapes or sizes.

11. The apparatus of claim 9 , wherein the pattern defined by the openings on the back side of the silicon substrate is one of: a crisscrossing rectangles pattern, a crisscrossing triangles pattern, a concentric circles pattern, a multiple-holes pattern, a multiple-rods pattern, and a radial pattern.

12. The apparatus of claim 9 , wherein the apparatus includes a lighting module that uses the LED as its light source.

13. The apparatus of claim 9 , wherein the openings each have a horizontal dimension in a range from about 10 microns to about 100 microns.

14. The apparatus of claim 9 , wherein the lattice-buffer layer contains at least one of: AlN and AlGaN.

15. The apparatus of claim 9 , wherein portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns.

16. The apparatus of claim 9 , wherein the III-V group compound layer is a first III-V group compound layer and has a first type of conductivity, and wherein the apparatus further comprises:

a light-emitting layer disposed over the first III-V group compound layer;

a second III-V group compound layer disposed over the light-emitting layer, the second III-V group compound layer having a second type of conductivity different from the first type;

a first conductive contact disposed on the first III-V group compound layer; and

a second conductive contact disposed on the second III-V group compound layer.

17. A device, comprising:

a wafer having a front side a back side opposite the front side, the wafer consisting of a silicon wafer, wherein a plurality of trenches are formed in the back side of the wafer, the plurality of trenches collectively defining a pattern on the back side of the wafer from a planar view;

a lattice-buffer layer disposed on the front side of the wafer, the lattice-buffer layer containing a material that reduces a lattice mismatch between a III-V group compound material and silicon or silicon carbide;

a first doped III-V group compound layer disposed over the lattice-buffer layer;

a light-emitting layer disposed over the first doped III-V group compound layer;

a second doped III-V group compound layer disposed over the light-emitting layer, wherein the first and second doped III-V group compound layers have different types of conductivity;

a first contact disposed over the first doped III-V group compound layer; and

a second contact disposed over the second doped III-V group compound layer.

18. The device of claim 17 , wherein the pattern is one of: a crisscrossing rectangles pattern, a crisscrossing triangles pattern, a concentric circles pattern, a multiple-holes pattern, a multiple-rods pattern, and a radial pattern.

19. The device of claim 17 , wherein the trenches each have a trench width in a range from about 10 microns to about 100 microns.

20. The device of claim 17 , wherein portions of the wafer aligned with the trenches have a thickness in a range from about 100 microns to about 300 microns.

Assignments (4)
CHANGE OF NAME Recorded Apr 22, 2026
From: EPISTAR CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075513/0783 →
MERGER Recorded Feb 23, 2016
From: CHIP STAR LTD.
To: EPISTAR CORPORATION
Reel/Frame 037805/0571 →
CHANGE OF NAME Recorded Feb 23, 2016
From: TSMC SOLID STATE LIGHTING LTD.
To: CHIP STAR LTD.
Reel/Frame 037809/0929 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2012
From: LI, ZHEN-YU; LIN, CHUNG-PAO; HSIA, HSING-KUO; KUO, HAO-CHUNG; SHU, CINDY HUICHUN; HUANG, HSIN-CHIEH
To: TSMC SOLID STATE LIGHTING LTD.
Reel/Frame 029403/0652 →