Converter and method which remains biased for operation in the pulse frequency modulation mode and pulse width modulation mode
In accordance with an embodiment, a DC-DC converter is provided comprising a single regulation loop that drives a control circuit, wherein the control circuit selects between operation in a pulse width modulation operating mode and a pulse frequency modulation operating mode, the single regulation loop including a compensation loop, and wherein biasing of the compensation loop is maintained in response to selecting between the pulse width modulation and the pulse frequency modulation operating modes.
1. A method for operating a multi-mode converter, comprising:
comparing an error signal with a reference signal to generate a first comparison signal;
operating in a pulse frequency modulation mode in response to the comparison signal; and
shifting from the pulse frequency modulation mode to a pulse width modulation mode in response to a plurality of zero crossing detection events, wherein the multi-mode converter remains biased for operating in the pulse frequency modulation mode and the pulse width modulation mode.
2. The method of claim 1 , further including:
comparing an adjusted error signal with the reference signal to generate a second comparison signal; and
shifting from the pulse frequency modulation mode to the pulse width modulation mode in response to the second comparison signal.
3. The method of claim 2 , using a single regulation loop to generate the error signal, the adjusted error signal, the first comparison signal and the second comparison signal.
4. The method of claim 1 , further including biasing the multi-mode converter for pulse width modulation operation during the pulse frequency modulation mode and pulse width modulation mode.
5. A method for operating a multi-mode controller, comprising:
providing a first control circuit having a first input and a first output;
coupling a second control circuit to the first control circuit, wherein the second control circuit has a first input, a first output, and a second output, the first input coupled to the first output of the first control circuit;
coupling an output stage to the second control circuit, the output stage having a first input, a second input, and an output, the first input of the output stage coupled to the first output of the second control circuit, the second input of the output stage coupled to the second output of the second control circuit, and the output of the output stage coupled to the first input of the first control circuit, wherein the first control circuit, the second control circuit, and the output stage form the multi-mode controller; and
operating the multi-mode control circuit in one of a pulse frequency modulation operating mode or a pulse width modulation operating mode in response to a current load at the output stage, wherein the multi-mode converter remains biased for operating in the pulse frequency modulation operating mode and the pulse width modulation operating mode, and further including shifting from the pulse frequency modulation operating mode to the pulse width modulation operating mode in response to a plurality of zero crossing detection events.
6. The method of claim 5 , wherein providing the first control circuit, comprises:
providing an error amplifier having first and second inputs and an output;
coupling a comparator to the error amplifier, wherein the comparator has first and second inputs and an output, the first input coupled to the output of the error amplifier, and wherein the output of the comparator serves as the first output of the first control circuit; and
coupling a second comparator having first and second inputs and an output, the second input of the second comparator coupled to the second input of the first comparator, wherein the output of the second comparator serves as a second output of the first control circuit.
7. The method of claim 6 , wherein coupling the output stage to the second control circuit includes providing the output stage having a first transistor having a control electrode and first and second current carrying electrodes, the control electrode coupled to the first output of the second control circuit and the first input coupled for receiving an input signal.
8. The method of claim 7 , further including coupling a reference generator to the second inputs of the first and second comparators.
9. The method of claim 5 , further including:
providing an error amplifier having first and second inputs and an output; and
coupling a comparator to the error amplifier, wherein the comparator has first and second inputs and an output, the first input coupled to the output of the error amplifier, and wherein the output of the comparator serves as the first output of the first control circuit.
10. The method of claim 9 , further including coupling a reference generator to the second input of the comparator.
11. The method of 9 , further including coupling a first impedance structure coupled between the first input and the output of the error amplifier and coupling a second impedance structure coupled to the first input of the error amplifier.
12. The method of claim 11 , wherein coupling the first impedance structure between the first input and the output of the error amplifier comprises:
coupling a first capacitor to the error amplifier, the first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor coupled to the first input of the error amplifier and the second terminal of the first capacitor coupled to the output of the error amplifier;
coupling a second capacitor to the output of the error amplifier, the second capacitor having a first terminal and a second terminal, the second terminal coupled to the output of the error amplifier; and
coupling a first resistor to the second capacitor, the first resistor having a first terminal and a second terminal, wherein coupling the first resistor to the second capacitor includes coupling the first terminal of the first resistor to the second terminal of the second capacitor and coupling the second terminal of the first resistor to the first input of the error amplifier.
13. The method of claim 12 , wherein coupling the second impedance structure to the first input of the error amplifier comprises:
coupling a first terminal of a second resistor to the first input of the error amplifier, the second resistor having the first terminal and a second terminal;
coupling a first terminal of a third resistor to the second terminal of the second resistor, the second resistor having the first terminal and a second terminal; and
coupling a first terminal of a third capacitor to the first terminal of the second resistor and a second terminal of the third capacitor to the second terminal of the third resistor.
14. The method of claim 5 , wherein operating the multi-mode control circuit in one of pulse frequency modulation operating mode or the pulse width modulation operating mode in response to a current load at the output stage includes operating in the pulse frequency modulation operating mode in response to a light current load and operating in the pulse width modulation operating mode in response to a higher current load.