IP Library Granted Patent US 8,859,425
Granted Patent B2
US 8,859,425 · App. 13/652,033 · Granted Oct 14, 2014

Devices, systems, and methods related to forming through-substrate vias with sacrificial plugs

Inventors: Kyle K. Kirby (Eagle, ID); Kunal R. Parekh (Boise, ID)
Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,859,425
App. No.
13/652,033
Granted
Oct 14, 2014
Kind
B2
Abstract

Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming one or more openings in a front side of the semiconductor device and forming sacrificial plugs in the openings that partially fill the openings. The method further includes further filling the partially filled openings with a conductive material, where individual sacrificial plugs are generally between the conductive material and a substrate of the semiconductor device. The sacrificial plugs are exposed at a backside of the semiconductor device. Contact regions can be formed at the backside by removing the sacrificial plugs.

Claims (62)

1. A method of manufacturing a semiconductor device, comprising:

forming one or more openings in a front side of the semiconductor device that extend through a portion of a substrate of the semiconductor device and define a surface in the substrate at a bottom of the opening;

forming sacrificial plugs in the openings;

further filling the openings with a conductive material, wherein individual sacrificial plugs are generally between the conductive material and the surface in the substrate at the bottom of the opening;

exposing the sacrificial plugs at a backside of the semiconductor device without exposing the conductive material at the backside; and

forming contact regions aligned in the openings by removing the sacrificial plugs.

2. The method of claim 1 , further comprising thinning the substrate at the backside of the semiconductor device,

wherein exposing the sacrificial plugs comprises removing material from the substrate after thinning the substrate,

and wherein forming contact regions further comprises:

defining voids by removing the sacrificial plugs; and

filling the voids with another conductive material.

3. The method of claim 2 , further comprising:

forming a first barrier/seed material between the sacrificial plug and the surface in the substrate at the bottom of the opening; and

forming a passivation material on the sacrificial plugs at the backside of the semiconductor device,

wherein exposing the sacrificial plugs further comprises removing material from the passivation material,

and wherein forming contact regions further comprises filling the voids with a second barrier/seed material that is between the other conductive material and the first barrier/seed material.

4. A method of manufacturing a semiconductor device, comprising:

forming one or more openings in a front side of the semiconductor device that extend through a portion of a substrate of the semiconductor device and define a surface in the substrate at a bottom of the opening;

forming sacrificial plugs in the openings, wherein forming the sacrificial plugs comprises filling the openings with polysilicon;

further filling the openings with a conductive material, wherein individual sacrificial plugs are generally between the conductive material and the surface in the substrate at the bottom of the opening;

exposing the sacrificial plugs at a backside of the semiconductor device; and

forming contact regions aligned in the openings by removing the sacrificial plugs.

5. The method of claim 1 , further comprising forming conductive structures electrically coupled to the conductive material at the contact regions.

6. The method of claim 5 , wherein forming the conductive structures comprises forming pillar or stand-off structures.

7. The method of claim 5 , further comprising forming a damascene structure that includes the conductive structures electrically isolated from one another by a passivation material.

8. The method of claim 1 , wherein further filling the openings with a conductive material comprises forming a barrier/seed material in the openings and on the sacrificial plugs.

9. The method of claim 8 , wherein the contact regions include a portion of the barrier/seed material.

10. The method of claim 8 , wherein the barrier/seed material includes a first barrier/seed material, and wherein the method further comprises forming a second barrier/seed material in the contact regions, wherein the second barrier/seed material is formed on a portion of the first barrier/seed material.

11. The method of claim 1 , wherein exposing the sacrificial plugs comprises:

thinning the substrate at the backside of the semiconductor device; and

after thinning the substrate, etching the substrate at the backside.

12. A method for forming a through-substrate via in a semiconductor device, comprising:

forming an opening through a portion of a substrate of the semiconductor device;

at least partially filling the opening with a conductive material and a sacrificial plug that separates the conductive material from a bottom surface of the opening; and

removing material from a portion of the substrate with the sacrificial plug being positioned to mask the conductive material during the removal of the material from the portion of the substrate,

wherein the semiconductor device is formed in a wafer, and wherein the sacrificial plug has a height that compensates for variation in height of other openings in the wafer.

13. The method of claim 12 , wherein the height further compensates for variation in a thinning process of the wafer.

14. The method of claim 12 , wherein at least partially filling the opening with the conductive material and the sacrificial plug comprises partially filling the opening with polysilicon and filling the conductive material on the polysilicon.

15. The method of claim 12 , wherein the conductive material includes a first conductive material, and wherein the method further comprises:

removing the sacrificial plug to form a void; and

forming an electrical coupling with the first conductive material by filling the void with a second conductive material.

16. A method for forming backside electrical contact with a through-substrate via, comprising:

exposing a sacrificial plug at a backside of a semiconductor device by removing material from a substrate of the semiconductor device;

exposing the through-substrate via by removing the sacrificial plug to form an opening; and

electrically coupling a conductive material with the through-substrate via by filling the opening with the conductive material.

17. The method of claim 16 , further comprising forming a conductive structure that includes the conductive material and has a shape at least partially defined by the opening.

18. The method of claim 17 , wherein the shape of the conductive structure includes a pillar or stand-off structure.

19. The method of claim 17 , further comprising forming a damascene structure that further defines the shape of the conductive structure.

20. The method of claim 16 , further comprising:

forming a mask at the backside of the semiconductor device that includes a pattern; and

forming a conductive structure that includes the conductive material and that has a shape at least partially defined by the pattern and the opening.

21. The method of claim 20 , wherein forming the mask includes forming a photoresist mask, and wherein forming the conductive structure includes lifting off the photoresist mask.

22. The method of claim 20 , further comprising:

forming a passivation material at the backside of the semiconductor device; and

transferring the pattern to the passivation material.

23. The method of claim 1 wherein the surface is a first surface, and wherein the method further comprises removing material from the substrate to define a second surface at the backside, wherein individual plugs of the plurality of plugs project beyond the second surface.

24. The method of claim 16 wherein the sacrificial plug includes polysilicon.

25. The method of claim 16 wherein exposing the sacrificial plug includes removing material from the substrate to define a surface at the backside and such that a portion of the sacrificial plug projects beyond the surface.

26. The method of claim 16 wherein:

the conductive material is a first conductive material;

the through substrate via includes a second conductive material and a seed material on the second conductive material; and

exposing the through-substrate via includes exposing the seed material.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2012
From: KIRBY, KYLE K.; PAREKH, KUNAL R.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 029130/0481 →
Continuity (1)
Related Publication 20140103520A1 · Apr 17, 2014