Method and system for arbitration verification
View Patent ↗A method for providing port arbitration verification for a design under test (DUT) is provided. The method includes sampling the availability of ports at a predetermined number of clock cycles prior to an arbitration point. The method predicts a winner at each of the clock cycles and determines a verification result based on a match between one of the predicted winners and an actual arbitration winner for the DUT.
1. A machine-implemented method for providing arbitration verification, the method comprising:
sampling port availability information for a plurality of ports of a network application specific integrated circuit (ASIC) at at least one clock cycle in advance of an arbitration point;
determining a predicted arbitration winner for each of the at least one clock cycle in advance of the arbitration point, based in part on the port availability information, wherein the predicted arbitration winner identifies one of the plurality of ports to gain access to the ASIC;
comparing each predicted arbitration winner to an actual arbitration winner selected by a design under test (DUT) comprising the network ASIC at the arbitration point;
determining a verification fail unless the arbitration winner matches at least one predicted arbitration winner.
2. The method of claim 1 , wherein a predicted arbitration winner is determined based on priority.
3. The method of claim 1 , wherein a predicted arbitration winner is determined based on a round robin protocol.
4. The method of claim 1 , wherein a predicted arbitration winner is determined based on a weighted round robin protocol.
5. A machine-implemented method for providing arbitration verification, the method comprising:
sampling port availability information for a plurality of ports of a network ASIC at least one clock cycle in advance of an arbitration point;
determining a predicted arbitration winner for each of the at least one clock cycle in advance of the arbitration point, based in part on the port availability information, wherein the predicted arbitration winner identifies one of the plurality of ports to gain access to the ASIC;
comparing each predicted arbitration winner to an actual arbitration winner selected by a design under test comprising the network ASIC at the arbitration point;
updating a reference model based on a matching predicted arbitration winner when the actual arbitration winner matches a predicted arbitration winner.
6. The method of claim 5 , wherein a predicted arbitration winner is determined for a plurality of clock cycles prior to the arbitration point.
7. The method of claim 5 , wherein a predicted arbitration winner is determined based on priority.
8. The method of claim 5 , wherein a predicted arbitration winner is determined based on port bandwidth.
9. The method of claim 5 , wherein a predicted arbitration winner is determined based on a round robin protocol.
10. A machine-implemented method for providing arbitration verification, the method comprising:
sampling port availability information for a plurality of ports of a network ASIC at a plurality of clock cycles in advance of an arbitration point;
determining a predicted arbitration winner for each of the plurality of clock cycles in advance of the arbitration point, based in part on the port availability information, wherein the predicted arbitration winner identifies one of the plurality of ports to gain access to the ASIC;
comparing each predicted arbitration winner to an actual arbitration winner selected by a design under test (DUT) comprising the network ASIC at the arbitration point;
determining a verification fail unless the arbitration winner matches at least one predicted arbitration winner.
11. The method of claim 10 , wherein a predicted arbitration winner is determined based on priority.
12. The method of claim 10 , wherein a predicted arbitration winner is determined based on port bandwidth.
13. The method of claim 10 , wherein a predicted arbitration winner is determined based on a round robin protocol.
14. A system for providing arbitration verification, comprising:
an arbitration verification system executed by a computing system for verifying arbitration used by a design under test;
wherein the arbitration verification system is configured to:
sample port availability information for a plurality of ports of the design under test at a plurality of clock cycles in advance of an arbitration point;
determine a predicted arbitration winner for each of the plurality of clock cycles in advance of the arbitration point, based in part on the port availability information, wherein the predicted arbitration winner identifies one of the plurality of ports to gain access to the ASIC;
compare each predicted arbitration winner to an actual arbitration winner selected by the design under test at the arbitration point; and
determine a verification fail unless the arbitration winner matches at least one predicted arbitration winner.
15. The system of claim 14 , wherein a predicted arbitration winner is determined based on priority.
16. The system of claim 14 , wherein a predicted arbitration winner is determined based on port bandwidth.
17. The system of claim 14 , wherein a predicted arbitration winner is determined based on a round robin protocol.