IP Library Granted Patent US 9,225,253
Granted Patent B2
US 9,225,253 · App. 13/658,640 · Granted Dec 29, 2015

High voltage switching linear amplifier and method therefor

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,225,253
App. No.
13/658,640
Granted
Dec 29, 2015
Kind
B2
Abstract

A switching linear amplifier has a DC-DC converter to increase a low input DC voltage to a first high voltage DC. A high voltage high frequency inverter is coupled to the DC-DC converter to generate high voltage pulses. A multistage voltage multiplier is coupled to the high voltage high frequency inverter to generate a second high voltage DC. A controlled charge and discharge circuit is coupled to the multistage voltage multiplier to drive a capacitive load.

Claims (61)

1. A switching linear amplifier comprising:

a DC-DC converter to increase a low input DC voltage to a first high voltage DC;

a high voltage high frequency inverter coupled to the DC-DC converter to generate high voltage pulses;

a multistage voltage multiplier coupled to the high voltage high frequency inverter to generate a second high voltage DC; and

a controlled charge and discharge circuit coupled to the multistage voltage multiplier to drive a capacitive load;

wherein the controlled charge and discharge circuit comprises:

a first series stacked N-channel MOSFETs with balancing resistors for a controlled charge; and

a second series of stacked N-channel MOSFETs with balancing resistors for a controlled discharge.

2. The amplifier of claim 1 , further comprising a charge pump coupled to the DC-DC converter.

3. The amplifier of claim 1 , where the DC-DC converter is comprises:

a MOSFET;

a gate driver for turning on and off the MOSFET;

an inductor coupled to the MOSFET;

a diode coupled to the inductor and the MOSFET; and

a high voltage capacitor coupled to the diode;

wherein the inductor is charged from the low input DC voltage and then discharged through the diode into the high voltage capacitor to generate the first high voltage DC.

4. The amplifier of circuit topology of claim 1 , wherein the high voltage high frequency inverter generates two outputs, wherein the two outputs are approximately 180 degrees out of phase with respect to each other.

5. The amplifier of claim 4 , wherein the high voltage high frequency inverter comprises a comparator to turn off the high voltage high frequency inverter when the output voltage is in regulation.

6. The amplifier of claim 4 , wherein the high voltage high frequency inverter comprises:

a comparator to turn off the high voltage high frequency inverter when the output voltage is in regulation; and

a logic gate to turn the comparator on and off at a desired frequency.

7. The amplifier of claim 1 , wherein the multistage voltage multiplier comprises:

a series of stacked diodes where the last diode goes to a high voltage capacitor;

an individual capacitor connecting to each node of the stacked diodes where an anode and cathode of two diodes are connected together;

wherein the other side of every capacitor are driven by high voltage pulses from the high voltage high frequency inverter.

8. The amplifier of claim 1 , wherein

the controlled charge and controlled discharge is controlled by an operational amplifier.

9. The amplifier of claim 1 , wherein the controlled charge and discharge circuit comprises a series stacked N-channel MOSFETs with balancing resistors for a controlled discharge, wherein the controlled discharge is controlled by an operational amplifier.

10. The amplifier of claim 1 , wherein the controlled charge and discharge circuit comprises:

an opto-coupler to allow the output load to have an undefined floating ground.

11. The amplifier of claim 1 , wherein the multistage voltage multiplier generates the second high voltage DC by multiplying an input voltage by an integer that is equal to a number of stages of the multistage voltage multiplier.

12. A switching linear amplifier comprising:

a charge pump to increase a low input DC voltage source for supplying a higher DC voltage for a gate driver;

a DC-DC converter to increase a low input DC voltage to a first high voltage DC and coupled to the charge pump to provide adequate gate drive voltage for increased efficiency;

a high voltage high frequency inverter coupled to the DC-DC converter to generate high voltage pulses, wherein the high voltage high frequency inverter generates two outputs, wherein the two outputs are approximately 180 degrees out of phase with respect to each other;

a multistage voltage multiplier coupled to the high voltage high frequency inverter to generate a second high voltage DC; and

a controlled charge and discharge circuit coupled to the multistage voltage multiplier to drive a capacitive load;

wherein the controlled charge and discharge circuit comprises:

a first series stacked N-channel MOSFETs with balancing resistors for a controlled charge; and

a second series of stacked N-channel MOSFETs with balancing resistors for a controlled discharge.

13. The amplifier of claim 12 , where the DC-DC converter comprises:

a MOSFET;

a gate driver for turning on and off the MOSFET;

an inductor coupled to the MOSFET;

a diode coupled to the inductor and the MOSFET; and

a high voltage capacitor coupled to the diode;

wherein the inductor is charged from the low input DC voltage and then discharged through the diode into the high voltage capacitor to generate the first high voltage DC.

14. The amplifier of claim 12 , wherein the multistage voltage multiplier comprises:

a series of stacked diodes where the last diode goes to a high voltage capacitor;

an individual capacitor connecting to each node of the stacked diodes where an anode and cathode of two diodes are connected together;

wherein the other side of every capacitor are driven by high voltage pulses from the high voltage high frequency inverter.

15. The amplifier of claim 12 ,

wherein the controlled charge and controlled discharge is controlled by an operational amplifier.

16. The amplifier of claim 15 , wherein the high voltage high frequency inverter comprises a comparator to turn off the high voltage high frequency inverter when the output voltage is in regulation.

17. The amplifier of claim 15 , wherein the high voltage high frequency inverter comprises:

a comparator to turn off the high voltage high frequency inverter when the output voltage is in regulation; and

a logic gate to turn the comparator on and off at a desired frequency.

18. The amplifier of claim 12 , wherein the controlled charge and discharge circuit comprises a series stacked N-channel MOSFETs with balancing resistors for a controlled discharge, wherein the controlled discharge is controlled by an operational amplifier.

19. The amplifier of claim 12 , wherein the controlled charge and discharge circuit comprises:

an opto-coupler to allow the output load to have an undefined floating ground.

20. The amplifier of claim 12 , wherein the multistage voltage multiplier generates the second high voltage DC by multiplying an input voltage by an integer that is equal to a number of stages of the multistage voltage multiplier.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2014
From: SUPERTEX LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 034689/0257 →
CHANGE OF NAME Recorded Dec 19, 2014
From: SUPERTEX, INC.
To: SUPERTEX LLC
Reel/Frame 034682/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2012
From: LEI, JIMES
To: SUPERTEX, INC.
Reel/Frame 029177/0305 →