Method and apparatus for a tunable driver circuit
View Patent ↗A driver circuit having an adjustable output signal includes a logic circuit configured to receive an input signal into a first input terminal and an output circuit coupled to the logic circuit, wherein the output circuit is configured to generate, at an output terminal of the output circuit, an output signal having a signal level that changes in response to a signal level of the input signal. The driver circuit further includes a feedback circuit coupled to a second input terminal of the logic circuit. The feedback circuit includes first and second gate terminals coupled to the output terminal and a third gate terminal coupled to a control signal supply, wherein the feedback circuit is configured to control a maximum level of the output signal from the driver circuit based on an operating threshold of the feedback circuit as set by a control signal generated by the control signal supply.
1. A method for controlling an output signal for a driver circuit, the method comprising:
receiving, into a driver circuit, an input signal;
generating, by the driver circuit, an output signal having a signal level that changes in response to a signal level of the input signal;
receiving the output signal into first and second gate terminals of a feedback circuit for the driver circuit;
receiving a control signal into a third gate terminal of the feedback circuit, wherein the control signal sets an operating threshold of the feedback circuit in order to control a maximum level of the output signal from the driver circuit, wherein the maximum level of the output signal is adjustable based on a value of the control signal.
2. The method of claim 1 , wherein receiving the control signal comprises receiving a continuous level control signal that enables continuous tuning of the maximum level of the output signal using an external reference voltage.
3. The method of claim 1 , wherein generating the output signal comprises generating an output signal comprising a voltage level that ranges between the maximum level of the output signal, which is less than a first supply voltage level for the driver circuit and a second supply voltage level for the driver circuit.
4. The method of claim 3 , wherein the second supply voltage level is a virtual ground.
5. The method of claim 1 , wherein the maximum level of the output signal is greater than an operating threshold of a receiving circuit coupled to the driver circuit.
6. The method of claim 1 , wherein the value of the control signal is based on at least one of manufacturing process characteristics or operating environment characteristics of an integrated circuit chip housing the driver circuit.
7. A driver circuit having an adjustable output signal, the driver circuit comprising:
a logic circuit configured to receive an input signal into a first input terminal;
an output circuit coupled to the logic circuit, wherein the output circuit is configured to generate, at an output terminal of the output circuit, an output signal having a signal level that changes in response to a signal level of the input signal;
a feedback circuit coupled to a second input terminal of the logic circuit, the feedback circuit comprising first and second gate terminals coupled to the output terminal and a third gate terminal coupled to a control signal supply, wherein the feedback circuit is configured to control a maximum level of the output signal from the driver circuit based on an operating threshold of the feedback circuit as set by a control signal generated by the control signal supply, wherein a value the control signal determines the maximum level of the output signal from the driver circuit.
8. The driver circuit of claim 7 , wherein the feedback circuit comprises a first inverter having an input comprising the first and second gate terminals coupled to the output terminal and an output coupled to the second input of the logic circuit.
9. The driver circuit of claim 8 , wherein the first inverter comprises:
a first transistor comprising the first gate terminal, a first terminal coupled to a first voltage supply, and a second terminal comprising the output of the inverter coupled to the second input of the logic circuit;
a second transistor comprising the second gate terminal, a first terminal coupled to a second voltage supply, and a second terminal; and
a third transistor comprising the third gate terminal, a first terminal coupled to the second terminal of the first transistor, and a second terminal coupled to the second terminal of the second transistor.
10. The driver circuit of claim 9 , wherein the first and third transistors comprise p-channel metal oxide semiconductor transistors, and the second transistor comprises an n-channel metal oxide semiconductor transistor.
11. The driver circuit of claim 9 , wherein the first voltage supply is configured to provide a first supply voltage level, and the second voltage supply is configured to provide a virtual ground voltage level, wherein the driver circuit is configured to generate an output signal comprising a voltage level that ranges from the virtual ground voltage level to the maximum level of the output signal, which is less than the first supply voltage level.
12. The driver circuit of claim 9 , wherein the logic circuit comprises:
a NAND logic gate comprising the first and second input terminals of the logic circuit and output; and
a second inverter having an input coupled to the first input terminal of the NAND gate and an output.
13. The driver circuit of claim 12 , wherein the output circuit comprises:
a fourth transistor having a first terminal coupled to the first voltage supply, a gate terminal coupled to an output of the NAND logic gate and a second terminal that is the output terminal of the output circuit; and
a fifth transistor having a first terminal coupled to the second voltage supply, a gate terminal coupled to the output of the second inverter and a second terminal coupled to the second terminal of the fourth transistor.
14. The driver circuit of claim 13 , wherein the fourth transistor comprises a p-channel metal oxide semiconductor transistor, and the fifth transistor comprises an n-channel metal oxide semiconductor transistor.
15. The driver circuit of claim 9 , wherein the first transistor comprises a p-channel metal oxide semiconductor transistor, and the second and third transistors comprise n-channel metal oxide semiconductor transistors.
16. The driver circuit of claim 7 , wherein the control signal supply includes a programmable element that is configured to generate a die-specific control signal, wherein the programmable element is programmable using an off-die input signal.
17. The driver circuit of claim 7 , wherein the control signal supply comprises a voltage regulator circuit located on a same integrated circuit chip with the driver circuit.
18. The driver circuit of claim 7 , wherein the driver circuit is formed on an integrated circuit and is coupled to the control signal supply and to a first receiving circuit formed on the integrated circuit and having a first receiving circuit operating threshold, wherein the control signal supply is configured to generate the control signal having a value that causes the maximum level of the output signal of the driver circuit to be greater than the first receiving circuit operating threshold.
19. The driver circuit of claim 7 , wherein the integrated circuit that contains the driver circuit also contains at least one other driver circuit coupled to the control signal supply and at lease one receiving circuit coupled to each of the other driver circuits and having corresponding receiving circuit operating thresholds, wherein the control signal supply is configured to generate the control signal having a value that causes a maximum level of an output signal of each driver circuit to be at least a maximum of all the receiving circuit operating thresholds.
20. A method for manufacturing an integrated circuit on a substrate containing multiple driver circuits each having an adjustable output signal, the method comprising:
forming a control signal supply on the substrate;
forming a set of driver circuits on the substrate, wherein each driver circuit is coupled to the control signal supply, and wherein each driver circuit comprises:
a logic circuit configured to receive an input signal into a first input terminal;
an output circuit coupled to the logic circuit, wherein the output circuit is configured to generate, at an output terminal of the output circuit, an output signal having a signal level that changes in response to a signal level of the input signal;
a feedback circuit coupled to a second input of the logic circuit, the feedback circuit comprising first and second gate terminals coupled to the output terminal and a third gate terminal coupled to the control signal supply, wherein the feedback circuit is configured to control a maximum level of the output signal from the driver circuit based on an operating threshold of the feedback circuit as set by a control signal generated by the control signal supply, wherein a value the control signal determines the maximum level of the output signal from the driver circuit; and
forming, on the substrate, a corresponding set of receiving circuits coupled to the output terminal of each driver circuit in the set of driver circuits, wherein each receiving circuit is formed to have an operating threshold, and the control signal supply is formed to generate the control signal having a signal level that causes the level of the output signal of each driver circuit to at least equal a maximum operating threshold of all the corresponding receiving circuits coupled to the driver circuit.