IP Library Granted Patent US 9,019,667
Granted Patent B2
US 9,019,667 · App. 13/671,623 · Granted Apr 28, 2015

Protection device and related fabrication methods

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Quick Facts
Patent No.
US 9,019,667
App. No.
13/671,623
Granted
Apr 28, 2015
Kind
B2
Abstract

Protection device structures and related fabrication methods are provided. An exemplary protection device includes a first bipolar junction transistor, a second bipolar junction transistor, a first zener diode, and a second zener diode. The collectors of the first bipolar junction transistors are electrically coupled. A cathode of the first zener diode is coupled to the collector of the first bipolar transistor and an anode of the first zener diode is coupled to the base of the first bipolar transistor. A cathode of the second zener diode is coupled to the collector of the second bipolar transistor and an anode of the second zener diode is coupled to the base of the second bipolar transistor. In exemplary embodiments, the base and emitter of the first bipolar transistor are coupled at a first interface and the base and emitter of the second bipolar transistor are coupled at a second interface.

Claims (65)

1. A protection circuit comprising:

a first bipolar junction transistor having a first collector, a first emitter, and a first base;

a second bipolar junction transistor having a second collector, a second emitter, and a second base, the second collector being coupled to the first collector;

a first diode having a first cathode and a first anode, the first cathode being coupled to the first collector and the first anode being coupled to the first base; and

a second diode having a second cathode and a second anode, the second cathode being coupled to the second collector and the second anode being coupled to the second base, wherein:

the second cathode comprises a cathode region of semiconductor material having a first conductivity type;

the second anode comprises a second anode region of semiconductor material having a second conductivity type; and

a separation distance between the cathode region and the second anode region provides non-snapback behavior in a first polarity direction.

2. The protection circuit of claim 1 , further comprising:

a first physical interface coupled to the first emitter and the first base; and

a second physical interface coupled to the second emitter and the second base.

3. The protection circuit of claim 2 , wherein:

the first bipolar junction transistor, the first diode, the second bipolar junction transistor and the second diode are encapsulated in a device package;

the first physical interface comprises a higher voltage terminal of the device package; and

the second physical interface comprises a lower voltage terminal of the device package.

4. The protection circuit of claim 3 , wherein a separation distance between the second anode and the second cathode is less than or equal to one micron to provide the non-snapback behavior in the first polarity direction from the higher voltage terminal to the lower voltage terminal.

5. The protection circuit of claim 4 , wherein the second anode abuts the second cathode.

6. The protection circuit of claim 3 , wherein a separation distance between the second anode and the second cathode is less than a separation distance between the first anode and the first cathode to provide the non-snapback behavior in the first polarity direction from the higher voltage terminal to the lower voltage terminal.

7. The protection circuit of claim 1 , wherein the first collector and the second collector comprise a common doped region.

8. The protection circuit of claim 7 , further comprising a sinker region underlying and abutting the cathode region, the sinker region having the first conductivity type, wherein:

the first collector and the second collector comprise a buried region having the first conductivity type underlying the sinker region; and

the sinker region abuts the buried region.

9. The protection circuit of claim 1 , wherein the first cathode and the second cathode comprise a common doped region, the common doped region comprising the cathode region.

10. The protection circuit of claim 1 , wherein a separation distance between the second anode and the second cathode is not equal to a separation distance between the first anode and the first cathode.

11. The protection circuit of claim 1 , wherein the second anode region abuts the cathode region.

12. A method of fabricating a protection device structure on a semiconductor substrate, the method comprising:

forming a first bipolar junction transistor on the semiconductor substrate;

forming a second bipolar junction transistor on the semiconductor substrate, the second bipolar junction transistor having a second collector coupled to a first collector of the first bipolar junction transistor;

forming a first diode on the semiconductor substrate, the first diode having a first cathode coupled to the first collector and a first anode coupled to a first base of the first bipolar junction transistor; and

forming a second diode on the semiconductor substrate, the second diode having a second cathode coupled to the second collector and a second anode coupled to a second base of the second bipolar junction transistor, wherein forming the second diode comprises forming the second anode within a separation distance of the second cathode, the separation distance resulting in the protection device structure exhibiting a non-snapback behavior in a first polarity direction.

13. The method of claim 12 , wherein:

forming the first diode comprises forming at least a portion of the first anode within the first base; and

forming the second diode comprises forming at least a portion of the second anode within the second base.

14. The method of claim 13 , wherein forming the second diode comprises forming the second anode extending from the second base such that a separation distance between the second anode and the second cathode is less than or equal to one micron.

15. The method of claim 12 , further comprising:

providing a first electrical connection between a first emitter of the first bipolar junction transistor and a first package interface; and

providing a second electrical connection between a second emitter of the second bipolar junction transistor and a second package interface.

16. The method of claim 12 , wherein:

forming the first bipolar junction transistor comprises:

forming a first well region having a first conductivity type within a first region having the first conductivity type overlying a buried region having a second conductivity type; and

forming a first emitter region having the second conductivity type within the first well region;

forming the second bipolar junction transistor comprises:

forming a second well region having the first conductivity type within a second region having the first conductivity type overlying the buried region; and

forming a second emitter region having the second conductivity type within the second well region; and

forming the first diode comprises:

forming a third well region having the second conductivity type laterally between the first region and the second region; and

forming a first anode region having the first conductivity type within the first well region proximate the third well region, the first anode region extending laterally into the first region between the first well region and the third well region.

17. The method of claim 16 , wherein forming the second diode comprises forming a second anode region having the first conductivity type within the second well region proximate the third well region, the second anode region extending laterally into the second region between the second well region and the third well region.

18. A protection device structure comprising:

a buried region of semiconductor material having a first conductivity type;

an epitaxial layer of semiconductor material having a second conductivity type overlying the buried region;

a first well region having the second conductivity type within the epitaxial layer;

a first emitter region having the first conductivity type within the first well region;

a second well region within the epitaxial layer;

a second emitter region having the first conductivity type within the second well region;

a third well region having the first conductivity type coupled to the buried region;

a first anode region having the second conductivity type within a first portion of the epitaxial layer between the third well region and the first well region, wherein the first anode region abuts the first well region; and

a second anode region having the second conductivity type within a second portion of the epitaxial layer, wherein:

the second anode region abuts the second well region; and

the second anode region abuts the third well region.

19. The protection device structure of claim 18 , wherein the second portion of the epitaxial layer is between the third well region and the second well region.

20. The protection device structure of claim 18 , further comprising a sinker region having the first conductivity type underlying and abutting the third well region, wherein:

a dopant concentration of the third well region is less than a dopant concentration of the sinker region;

the sinker region resides laterally between the first well region and the second well region; and

the sinker region overlies and abuts the buried region.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
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PATENT RELEASE Recorded Jan 14, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TITLE: ZENER TRIGGERED BIPOLAR BASED ESD PROTECTION DEVICE PREVIOUSLY RECORDED ON REEL 029261 FRAME 0489. ASSIGNOR(S) HEREBY CONFIRMS THE TITLE: PROTECTION DEVICE AND RELATED FABRICATION METHODS. Recorded Nov 21, 2012
From: GILL, CHAI EAN; HONG, CHANGSOO; ZHAN, ROUYING; COWDEN, WILLIAM G.
To: FREESCALE SEMICONDUCTOR, INC.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2012
From: GILL, CHAI EAN; HONG, CHANGSOO; ZHAN, ROUYING; COWDEN, WILLIAM G
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