Battery-less cache memory module with integrated backup
View Patent ↗A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.
1. A memory device, comprising:
a volatile memory device;
a non-volatile memory device;
a volatile memory controller coupled to the volatile memory device;
a non-volatile memory controller coupled to the non-volatile memory device;
a backup power source arranged to temporarily power the volatile memory device, non-volatile memory device, volatile memory controller, and non-volatile memory controller upon a loss of power from an external power source;
a switch to selectively couple a host memory bus to either the volatile memory controller or the non-volatile memory controller; and
a logic device coupled to the volatile memory, wherein upon detection of the loss of power from the external power source or an external triggering signal the logic device is configured to:
electrically decouple the host memory bus from the volatile memory device, and
transfer data from the volatile memory device to the non-volatile memory device.
2. The memory device of claim 1 , wherein the transfer of data from the volatile memory device to the non-volatile memory device is via a direct path between the volatile memory controller and non-volatile memory controller that bypasses the switch.
3. The memory device of claim 1 , wherein the data transfer from the volatile memory device to the non-volatile memory device is via the switch.
4. The memory device of claim 1 , wherein the backup power source is charged by the external power source.
5. The memory device of claim 1 , wherein upon resumption of the presence of power above a threshold from the external power source the logic device is configured to:
transfer data from the non-volatile memory device to the volatile memory device, and
electrically couple the host memory bus to the volatile memory device.
6. The memory device of claim 5 , wherein the data transfer is triggered by an external signal from a host system.
7. The memory device of claim 1 , further comprising:
a buffer coupled between the volatile memory controller and non-volatile memory controller to temporarily store data being transferred between the volatile memory device and the non-volatile memory device.
8. The memory device of claim 1 , wherein an external signal from a host system selects whether the switch routes data from the host memory bus to the volatile memory controller or the non-volatile memory controller.
9. The memory device of claim 1 , further comprising:
a first data bus coupled between the switch and the volatile memory controller; and
a second data bus coupled between the switch and the non-volatile memory controller.
10. The memory device of claim 1 , wherein upon receipt of an external triggering signal the logic device is further configured to:
electrically decouple the host memory bus from the memory device, and
cause the transfer of data from the volatile memory device to the non-volatile memory device.
11. A memory device, comprising:
a volatile memory device;
a non-volatile memory device;
a volatile memory controller;
a non-volatile memory controller coupled to the non-volatile memory device; and
a backup power source arranged to temporarily power the volatile memory device, non-volatile memory device, volatile memory controller, and non-volatile memory controller upon a loss of power from an external power source; and
a switch having a first interface coupled to a host memory bus, a second interface coupled to the volatile memory controller, and a third interface coupled to the volatile memory device,
wherein upon detection of the loss of power from the external power source or an external triggering event:
the switch decouples the host memory bus from the volatile memory device, and
the volatile memory controller transfers data from the volatile memory device to the non-volatile memory device via the non-volatile memory controller.
12. The memory device of claim 11 , wherein in a first mode of operation, the switch transfers data between the host memory bus and the third interface to the volatile memory device.
13. The memory device of claim 12 , wherein in a second mode of operation, the switch transfers data between the host memory bus and the non-volatile memory device via the volatile memory controller and the non-volatile memory controller.
14. The memory device of claim 13 , wherein in a third mode of operation, the switch transfers data between the volatile memory device and the non-volatile memory device via the volatile memory controller and the non-volatile memory controller.
15. The memory device of claim 11 , further comprising:
a buffer coupled inline between the volatile memory controller and non-volatile memory controller to temporarily store data being transferred between the volatile memory controller and the non-volatile memory controller.
16. A memory device, comprising:
a volatile memory device;
a non-volatile memory device;
a volatile memory controller coupled to the volatile memory device;
a non-volatile memory controller;
a backup power source arranged to temporarily power the volatile memory device, non-volatile memory device, volatile memory controller, and non-volatile memory controller upon a loss of power from an external power source; and
a switch having a first interface coupled to a host memory bus, a second interface coupled to the non-volatile memory controller, and a third interface coupled to the non-volatile memory device,
wherein upon detection of the loss of power from the external power source or an external triggering event:
the switch decouples the host memory bus from the volatile memory device, and
the volatile memory controller transfers data from the volatile memory device to the non-volatile memory device via the non-volatile memory controller.
17. The memory device of claim 16 , wherein in a first mode of operation, the switch transfers data between the host memory bus and the third interface to the non-volatile memory device.
18. The memory device of claim 17 , wherein in a second mode of operation, the switch transfers data between the host memory bus and the volatile memory device via the non-volatile memory controller and the volatile memory controller.
19. The memory device of claim 18 , wherein in a third mode of operation, the switch transfers data between the volatile memory device and the non-volatile memory device via the volatile memory controller and the non-volatile memory controller.
20. The memory device of claim 16 , further comprising:
a buffer coupled inline between the volatile memory controller and non-volatile memory controller to temporarily store data being transferred between the volatile memory controller and the non-volatile memory controller.