Systems and methods for primitive sequence capture and retransmission in a network device
View Patent ↗Method and systems for a network device are provided. The method includes receiving configuration data having a primitive sequence comprising a first primitive and a second primitive at a first clock rate at a port of the network device; writing the configuration data into a smoothing module of the port at the first clock rate; reading the configuration data out of the smoothing module at a second clock rate; allowing a primitive to be inserted or deleted in the smoothing module to prevent smoothing module underflows or overflow; regenerating the primitive sequence at the second clock rate; and transmitting the regenerated primitive sequence to the destination port.
1. A machine implemented method for a network device, comprising:
receiving configuration data having a primitive sequence comprising a first primitive and a second primitive at a first clock rate at a port of the network device, wherein the received configuration data is destined for a destination port using a switch port bypass mode; and the port includes a plurality of sub-ports that can each be configured to operate as independent ports for sending and receiving information using one of a plurality of network links at a plurality of rates complying with a plurality of protocols;
writing the configuration data into a smoothing module of the port at the first clock rate;
reading the configuration data out of the smoothing module at a second clock rate;
allowing a primitive to be inserted or deleted in the smoothing module to prevent smoothing module underflows or overflow;
regenerating the primitive sequence at the second clock rate; and
transmitting the regenerated primitive sequence to the destination port.
2. The method of claim 1 , wherein receiving configuration data further comprises capturing the configuration data in a holding register of a physical coding sub-layer (PCS).
3. The method of claim 1 , wherein transmitting the primitive sequence further comprises transmitting the first primitive and second primitive as a pair.
4. The method of claim 1 , further comprising receiving an Idle primitive in data received at the port; and transitioning from transmitting the primitive sequence to transmitting the received data to the destination port.
5. The method of claim 1 , wherein one of the plurality of sub-ports is configured to operate as an Ethernet port in the switch bypass mode.
6. The method of claim 1 , wherein the second clock rate comprises an internal system clock rate of the network switch element.
7. The method of claim 1 , wherein the network device is a switch element coupled to a first network device and a second network device for receiving the configuration data from the first network device and transmitting the configuration data to the second network device.
8. A system, comprising:
a network switch element coupled to a first network device and a second network device via a plurality of network links;
wherein the network switch element comprises: a processor for executing firmware code; and a first port having a plurality of sub-ports that can each be configured to operate as independent ports for sending and receiving information using one of the plurality of network links at a plurality of rates complying with a plurality of protocols; and a smoothing module for storing information received by the first port; and
wherein the processor executable firmware code determines when the first port receives configuration data, including a primitive sequence having a first primitive and a second primitive from the first network device at a first clock rate and destined for the second network device in a bypass mode; writes the configuration data into the smoothing module at the first clock rate; reads the configuration data out of the smoothing module at a second clock rate; inserts or deletes a primitive in the smoothing module to prevent smoothing module underflow or overflow condition; regenerates the primitive sequence at the second clock rate when the primitive sequence is detected in the receive data; and transmits the regenerated primitive sequence to the second network device.
9. The system of claim 8 , wherein the primitive sequence is transmitted in pairs.
10. The system of claim 8 , wherein the received configuration data is captured in a holding register of a physical coding sub-layer (PCS).
11. The system of claim 10 , wherein the smoothing module is a part of the PCS.
12. The system of claim 8 , wherein one of the plurality of sub-ports is configured to operate as an Ethernet port in the switch bypass mode.
13. The system of claim 8 , wherein the second clock rate comprises an internal system clock rate of the network switch element.
14. A network switch element, comprising:
a processor for executing firmware code;
a first port having a plurality of sub-ports that can each be configured to operate as independent ports for sending and receiving information using one of the plurality of network links at a plurality of rates complying with a plurality of protocols; and
a smoothing module for the first port for receiving configuration data from a first network device and destined for a second network device while the first port operates in a bypass mode;
wherein the processor executable firmware code: determines when the first port receives configuration data having a primitive sequence including a first primitive and a second primitive, from the first network device at a first clock rate, writes the configuration data into the smoothing module at the first clock rate; reads the configuration data out of the smoothing module at a second clock rate; allows a primitive to be inserted or deleted in the smoothing module to prevent smoothing module underflow or overflow conditions; regenerates the primitive sequence at the second clock rate when the primitive is detected; and transmits the regenerated primitive sequence to the second network device.
15. The network switch element of claim 14 , wherein the received configuration data is captured in a holding register.
16. The network switch element of claim 14 , wherein the primitive sequence is transmitted in pairs.
17. The network switch element of claim 14 , wherein the smoothing module is a part of a physical coding sub-layer (PCS) of the first port.
18. The network switch element of claim 14 , wherein one of the plurality of sub-ports is configured to operate as an Ethernet port in the switch bypass mode.
19. The network switch element of claim 14 , wherein the second clock rate comprises an internal system clock rate of the network switch element.
20. The network switch element of claim 14 , wherein one of the sub-ports is configured to operate as a Fibre Channel port.