IP Library Granted Patent US 9,461,930
Granted Patent B2
US 9,461,930 · App. 13/687,958 · Granted Oct 4, 2016

Modifying data streams without reordering in a multi-thread, multi-flow network processor

Inventors: Steven J. Pollock (Allentown, PA); Deepak Mital (Orefield, PA); James T. Clee (Orefield, PA)
Assignee: Intel Corporation
H04L47/6205G06F15/167H04L47/2441H04L49/00H04L49/101H04L49/109H04L49/506
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Quick Facts
Patent No.
US 9,461,930
App. No.
13/687,958
Granted
Oct 4, 2016
Kind
B2
Abstract

Described embodiments classify packets received by a network processor. A processing module of the network processor generates tasks corresponding to each received packet. A scheduler generates contexts corresponding to tasks received by the packet classification processor from corresponding processing modules, each context corresponding to a given flow, and stores each context in a corresponding per-flow first-in, first-out buffer of the scheduler. A packet modifier generates a modified packet based on threads of instructions, each thread of instructions corresponding to a context received from the scheduler. The modified packet is generated before queuing the packet for transmission as an output packet of the network processor, and the packet modifier processes instructions for generating the modified packet in the order in which the contexts were generated for each flow, without head-of-line blocking between flows. The modified packets are queued for transmission as an output packet of the network processor.

Claims (80)

1. A packet classification processor for a network processor having a plurality of processing modules and at least one shared memory, wherein the network processor generates one or more tasks corresponding to each of a plurality of received packets, the packet processor comprising:

a scheduler configured to generate one or more contexts corresponding to tasks received by the packet classification processor from corresponding ones of the plurality of processing modules, each context corresponding to a given flow, wherein each context is stored in a corresponding per-flow first-in, first-out buffer;

a packet modifier configured to generate a modified packet based on one or more threads of instructions, each thread of instructions corresponding to a context received from the scheduler, wherein the modified packet is generated before the packet is queued for transmission as an output packet of the network processor, wherein the packet modifier is configured to process instructions for generating the modified packet in the order in which the contexts were generated for each flow, without head-of-line blocking between flows;

the network processor is configured to (i) queue the modified packet in an associated output queue, (ii) schedule a queued packet for transmission as an output packet of the network processor, and (iii) transmit the scheduled packet as an output packet.

2. The packet classification processor of claim 1 , further comprising:

a classifier configured to classify a traffic type of each received packet.

3. The packet classification processor of claim 1 , wherein the packet modifier comprises:

one or more per-flow state registers configured to maintain state data for each flow, wherein the per-flow state registers point to a first instruction in a corresponding instruction list of the flow;

an instruction manager configured to generate one or more instruction lists, each instruction list comprising a list of instructions for the packet modifier to process to generate a modified packet corresponding to the flow associated with the instruction list, the one or more instructions in each instruction list corresponding to instructions stored in an instruction memory of the packet modifier;

an instruction execution module configured to process completed instruction lists;

a packet modifying engine configured to (i) read packet data from the at least one shared memory, (ii) modify the read packet data based on the corresponding instructions executed by the instruction execution module, and (iii) write the modified packet data to the at least one shared memory.

4. The packet classification module of claim 1 , wherein the modified packet data is processed by one or more of the plurality of processing modules of the network processor before the packet is transmitted as an output packet.

5. The packet classification module of claim 1 , wherein the packet modifier is configured to interleave modified packet data corresponding to any of the independent flows, thereby processing multiple flows in parallel and reducing head-of-line blocking.

6. The packet classification module of claim 1 , further comprising:

a thread status manager configured to maintain:

(i) a thread status table having N status entries, configured to track up to N active threads, where N is a positive integer, and wherein each status entry corresponds to an active thread, and each status entry comprises a valid status indicator, a sequence value, a thread indicator value, and a flow indicator value, and

(ii) a sequence counter configured to generate a sequence value for each thread of each flow, wherein the sequence counter is incremented each time processing of a thread for a flow is started by the multi-thread instruction engine, and the sequence counter is decremented each time a thread for a flow is completed by the multi-thread instruction engine, whereby a lower relative sequence value indicates an earlier started thread for each flow,

wherein the thread indicator value of an oldest thread of each flow of the thread status table has a corresponding sequence value equal to 0 for each flow.

7. A method of classifying packets received by a network processor having a plurality of processing modules and at least one shared system memory, the method comprising:

generating, by at least one of the plurality of processing modules, one or more tasks corresponding to each of a plurality of received packets;

generating, by a scheduler, one or more contexts corresponding to tasks received by the packet classification processor from corresponding ones of the plurality of processing modules, each context corresponding to a given flow, and storing each context in a corresponding per-flow first-in, first-out buffer of the scheduler;

generating, by a packet modifier, a modified packet based on one or more threads of instructions, each thread of instructions corresponding to a context received from the scheduler, wherein the modified packet is generated before queuing the packet for transmission as an output packet of the network processor, wherein the packet modifier processes instructions for generating the modified packet in the order in which the contexts were generated for each flow, without head-of-line blocking between flows;

queuing the modified packet in an associated output queue;

scheduling a queued packet for transmission as an output packet of the network processor; and

transmitting the scheduled packet as an output packet.

8. The method of claim 7 , further comprising:

classifying, by a classifier of the packet classification module, a traffic type of each received packet.

9. The method of claim 7 , further comprising:

maintaining, by one or more per-flow state registers of the packet modifier, state data for each flow, wherein the per-flow state registers point to a first instruction in a corresponding instruction list of the flow;

generating, by an instruction manager of the packet modifier, one or more instruction lists, each instruction list comprising a list of instructions for the packet modifier to process to generate a modified packet corresponding to the flow associated with the instruction list, the one or more instructions in each instruction list corresponding to instructions stored in an instruction memory of the packet modifier;

processing, by an instruction execution module of the packet modifier, completed instruction lists;

by a packet modifying engine of the packet modifier:

reading packet data from the at least one shared memory;

modifying the read packet data based on the corresponding instructions executed by the instruction execution module; and

writing the modified packet data to the at least one shared memory.

10. The method of claim 7 , further comprising:

processing the modified packet data by one or more of the plurality of processing modules of the network processor before transmitting the packet as an output packet of the network processor.

11. The method of claim 7 , further comprising:

interleaving, by the packet modifier, modified packet data corresponding to any of the independent flows, thereby processing multiple flows in parallel and reducing head-of-line blocking.

12. The method of claim 7 , further comprising the steps of:

allocating, by the scheduler, a corresponding one of the one or more threads for each flow to the multi-thread instruction engine for processing; and

deallocating, by the scheduler, a corresponding one of the one or more threads for each flow from the multi-thread instruction engine upon the multi-thread instruction engine completing the corresponding thread.

13. The method of claim 7 , further comprising:

maintaining, by a thread status manager, (i) a thread status table having N status entries, where N is a positive integer, and (ii) a sequence counter for each flow;

tracking, by the thread status table, up to N active threads, wherein each status entry corresponds to an active thread, and each status entry comprises a valid status indicator, a sequence value, a thread indicator value, and a flow indicator value,

generating, by each sequence counter, a sequence value for each thread by the steps of:

incrementing the sequence counter each time processing of a thread for the associated flow is started by the multi-thread instruction engine, and

decrementing the sequence counter each time a thread for the associated flow is completed by the multi-thread instruction engine, whereby a lower relative sequence value indicates an earlier started thread for the flow; and

providing, by the thread status manager to the scheduler, the oldest thread for each flow of the thread status table, wherein the oldest thread has a corresponding sequence value equal to 0 for each flow.

14. A non-transitory machine-readable medium, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements a method of classifying packets received by a network processor having a plurality of processing modules and at least one shared system memory, the method comprising:

generating, by at least one of the plurality of processing modules, one or more tasks corresponding to each of a plurality of received packets;

generating, by a scheduler, one or more contexts corresponding to tasks received by the packet classification processor from corresponding ones of the plurality of processing modules, each context corresponding to a given flow, and storing each context in a corresponding per-flow first-in, first-out buffer of the scheduler;

generating, by a packet modifier, a modified packet based on one or more threads of instructions, each thread of instructions corresponding to a context received from the scheduler, wherein the modified packet is generated before queuing the packet for transmission as an output packet of the network processor, wherein the packet modifier processes instructions for generating the modified packet in the order in which the contexts were generated for each flow, without head-of-line blocking between flows;

queuing the modified packet in an associated output queue;

scheduling a queued packet for transmission as an output packet of the network processor; and

transmitting the scheduled packet as an output packet.

15. The non-transitory machine-readable medium of claim 14 , further comprising:

classifying, by a classifier of the packet classification module, a traffic type of each received packet.

16. The non-transitory machine-readable medium of claim 14 , further comprising:

maintaining, by one or more per-flow state registers of the packet modifier, state data for each flow, wherein the per-flow state registers point to a first instruction in a corresponding instruction list of the flow;

generating, by an instruction manager of the packet modifier, one or more instruction lists, each instruction list comprising a list of instructions for the packet modifier to process to generate a modified packet corresponding to the flow associated with the instruction list, the one or more instructions in each instruction list corresponding to instructions stored in an instruction memory of the packet modifier;

processing, by an instruction execution module of the packet modifier, completed instruction lists;

by a packet modifying engine of the packet modifier:

reading packet data from the at least one shared memory;

modifying the read packet data based on the corresponding instructions executed by the instruction execution module; and

writing the modified packet data to the at least one shared memory.

17. The non-transitory machine-readable medium of claim 14 , further comprising:

processing the modified packet data by one or more of the plurality of processing modules of the network processor before transmitting the packet as an output packet of the network processor.

18. The non-transitory machine-readable medium of claim 14 , further comprising:

interleaving, by the packet modifier, modified packet data corresponding to any of the independent flows, thereby processing multiple flows in parallel and reducing head-of-line blocking.

19. The non-transitory machine-readable medium of claim 14 , further comprising the steps of:

allocating, by the scheduler, a corresponding one of the one or more threads for each flow to the multi-thread instruction engine for processing; and

deallocating, by the scheduler, a corresponding one of the one or more threads for each flow from the multi-thread instruction engine upon the multi-thread instruction engine completing the corresponding thread.

20. The non-transitory machine-readable medium of claim 14 , further comprising:

maintaining, by a thread status manager, (i) a thread status table having N status entries, where N is a positive integer, and (ii) a sequence counter for each flow;

tracking, by the thread status table, up to N active threads, wherein each status entry corresponds to an active thread, and each status entry comprises a valid status indicator, a sequence value, a thread indicator value, and a flow indicator value,

generating, by each sequence counter, a sequence value for each thread by the steps of:

incrementing the sequence counter each time processing of a thread for the associated flow is started by the multi-thread instruction engine, and

decrementing the sequence counter each time a thread for the associated flow is completed by the multi-thread instruction engine, whereby a lower relative sequence value indicates an earlier started thread for the flow; and

providing, by the thread status manager to the scheduler, the oldest thread for each flow of the thread status table, wherein the oldest thread has a corresponding sequence value equal to 0 for each flow.

Assignments (5)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 32856/0031 Recorded Nov 18, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 034286/0872 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2012
From: POLLOCK, STEVEN J.; MITAL, DEEPAK; CLEE, JAMES T.
To: LSI CORPORATION
Reel/Frame 029367/0592 →
Continuity (5)
Continuation In Part 12782379 · May 18, 2010
Continuation In Part 12782393 · May 18, 2010
Continuation In Part 12782411 · May 18, 2010
Provisional Application 61564811 · Nov 29, 2011
Related Publication 20130089099A1 · Apr 11, 2013