Reducing MEMS stiction by deposition of nanoclusters
View Patent ↗A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of one or both of the surfaces. The increased roughness is provided by forming a micro-masking layer on a sacrificial layer used in formation of the MEMS device, and then etching the surface of the sacrificial layer. The micro-masking layer can be formed using nanoclusters. When a next portion of the MEMS device is formed on the sacrificial layer, this portion will take on the roughness characteristics imparted on the sacrificial layer by the etch process. The rougher surface decreases the surface area available for contact in the MEMS device and, in turn, decreases the area through which stiction can be imparted.
1. A method for manufacturing a microelectromechanical systems (MEMS) device, the method comprising:
forming a first polysilicon layer over a substrate;
forming a sacrificial layer over the first polysilicon layer;
forming a plurality of nanoclusters on the sacrificial layer;
etching the sacrificial layer using a wet etch process subsequent to said forming the plurality of nanoclusters, wherein
the wet etch is selective to the sacrificial layer,
the nanoclusters provide a micro-masking layer for said etching, and
said etching increases roughness of the surface of the sacrificial layer as compared to the roughness of the surface upon said forming the sacrificial layer;
removing the nanoclusters from the surface of the sacrificial layer; and
forming a second polysilicon layer on the sacrificial layer subsequent to said etching the sacrificial layer, wherein said removing is performed subsequent to said etching and prior to said forming the second polysilicon layer.
2. The method of claim 1 , wherein
the nanoclusters comprise germanium, and
said removing is performed using a peroxide etch.
3. The method of claim 1 wherein said nanoclusters comprise one of silicon or germanium.
4. The method of claim 1 wherein said forming the plurality of nanoclusters comprises:
performing a low temperature deposition of nanocluster material; and
performing an anneal to form the nanoclusters.
5. The method of claim 4 wherein said performing the low temperature deposition of nanocluster material further comprises:
depositing sufficient material to form nanoclusters having a diameter of approximately 20 nm or greater upon performing said annealing.
6. The method of claim 1 further comprising:
forming a first insulating layer over the substrate, wherein the first polysilicon layer is formed over the first insulating layer;
forming a second insulating layer over at least a portion of the first polysilicon layer, wherein
the sacrificial layer is further formed over the second insulating layer.
7. The method of claim 1 further comprising:
removing the sacrificial layer using a wet etch process subsequent to said forming the second polysilicon layer.
8. The method of claim 7 , wherein the second polysilicon layer comprises a plurality of surface roughness features having a height of between about 25 nm to about 50 nm.