Distributed electrostatic discharge protection circuit
View Patent ↗A distributed electrostatic discharge (ESD) protection circuit is provided. At frequencies beyond 10 GHz, the parasitic capacitance of primary ESD protection voltage clamping devices, such as diodes, hampers adequate insertion and return loss, in spite of lumped inductor tuning. An ESD protection circuit according to an embodiment of the present disclosure solves the problem by distributing the diode, or voltage clamping device, capacitance among several sections of an artificial transmission line. The power and ground ESD return paths are also distributed to ensure a constant current density in the voltage clamping segments, even for fast charged-device model (CDM) discharge events. By sharing the ESD return paths between differential inputs (or outputs), these return paths have no impact on differential return or insertion loss.
1. An electrostatic discharge (ESD) protection circuit for protecting a protected circuit, the ESD protection circuit comprising:
a signal path;
a plurality of voltage clamping sections each comprising a voltage clamping device, each of the plurality of voltage clamping sections having a signal end and a return end, each of the signal ends being connected to the signal path, the plurality of voltage clamping sections providing distributed ESD protection; and
a single return node to which all of the return ends are connected so as to produce a single return path, the return path comprising a plurality of return path impedance sections configured such that voltage drops along the return path match voltage drops along the signal path.
2. The ESD protection circuit of claim 1 wherein the return path comprises a plurality of return path impedance sections configured such that equal current densities are produced in each of the plurality of voltage clamping sections.
3. The ESD protection circuit of claim 1 wherein the return path comprises a plurality of return path impedance sections configured such that a constant current density is produced in each of the plurality of voltage clamping sections.
4. The ESD protection circuit of claim 3 wherein the constant current density in the plurality of voltage clamping sections is maintained during a fast charged-device model discharge ESD event.
5. The ESD protection circuit of claim 3 wherein the constant current density in the plurality of voltage clamping sections is maintained during a sub-nanosecond ESD event.
6. The ESD protection circuit of claim 3 wherein the constant current density in the plurality of voltage clamping sections is maintained during an ESD event of any pulse shape or duration.
7. The ESD protection circuit of claim 1 wherein the return path is common mode such that differential return loss is unaffected by characteristics of the return path.
8. The ESD protection circuit of claim 1 wherein each of the voltage clamping devices in the plurality of voltage clamping sections absorbs the same current density.
9. The ESD protection circuit of claim 1 wherein each of the voltage clamping devices in the plurality of voltage clamping sections has an equal voltage across the voltage clamping device.
10. The ESD protection circuit of claim 1 wherein each of plurality of voltage clamping sections comprises only the voltage clamping device between the signal end and the return end.
11. The ESD protection circuit of claim 1 wherein:
the signal path comprises initial and final impedance sections and a plurality of intermediate signal path impedance sections; and
each of the signal ends of the plurality of voltage clamping sections is connected to the signal path adjacent to one of the plurality of intermediate signal path impedance sections.
12. The ESD protection circuit of claim 11 wherein the plurality of voltage clamping sections comprise a plurality of diode sections each comprising a diode.
13. The ESD protection circuit of claim 12 wherein the diodes in the plurality of diode sections have equal diode areas, and each of the diodes in the plurality of diode sections contributes equally to the protection of the protected circuit.
14. The ESD protection circuit of claim 13 wherein each of the plurality of intermediate signal path impedance sections has an impedance of Z, and the plurality of return path impedance sections have a geometric mean impedance value of Z.
15. The ESD protection circuit of claim 14 wherein:
the plurality of diode sections comprises N diode sections having diodes of equal size;
the plurality of return path impedance sections comprises m return path impedance sections; and
wherein values of the return path impedance sections are defined by
Z
Rm
=
Z
·
m
N
-
m
wherein Z R1 is closest to the single return node and Z Rm is farthest from the single return node.
16. The ESD protection circuit of claim 15 wherein the plurality of return path impedances comprises three impedance sections having impedance values of 3Z, Z and Z/3, in order of farthest from the return node to closest to the return node.
17. The ESD protection circuit of claim 12 wherein some of the diodes in the plurality of diode sections have unequal diode areas, and each of the diodes in the plurality of diode sections contributes equally to the protection of the protected circuit.
18. The ESD protection circuit of claim 17 wherein:
the plurality of intermediate signal path impedance sections comprise m intermediate signal path impedance sections with respective impedances of Z 1 to Z m ;
the plurality of diode sections comprises N diode sections having diodes of size A 1 to A k ;
the plurality of return path impedance sections comprises m return path impedance sections; and
wherein values of the return path impedance sections are defined by
Z
Rm
=
Z
m
·
∑
k
=
1
m
A
k
∑
k
=
m
+
1
N
A
k
wherein Z R1 is closest to the single return node and Z Rm is farthest from the single return node.
19. An electrostatic discharge (ESD) protection circuit for protecting a protected circuit, the ESD protection circuit comprising:
a signal path;
a return path; and
a plurality of voltage clamping sections each comprising a voltage clamping device, the plurality of voltage clamping sections having a signal end connected to the signal path and a return end connected to the return path, each of the plurality of voltage clamping sections contributing equally to the protection of the protected circuit, each of the plurality of voltage clamping sections comprising only the voltage clamping device between the signal end and the return end.
20. The ESD protection circuit of claim 19 further comprising:
a single return node to which all of the return ends are connected so as to produce a single return path.
21. The ESD protection circuit of claim 19 wherein the return path is common mode such that differential return loss is unaffected by characteristics of the return path.
22. The ESD protection circuit of claim 19 wherein the plurality of voltage clamping sections comprise, in order from farthest from an input/output pad to closest to the I/O pad:
a first voltage clamping section including only the voltage clamping device;
a second voltage clamping section including the voltage clamping device and a resistance of R;
a third voltage clamping section including the voltage clamping device and a resistance of 3R; and
a fourth diode section including the voltage clamping device and a resistance of 6R.
23. The ESD protection circuit of claim 19 wherein the plurality of voltage clamping sections comprise a plurality of diode sections each comprising a diode.
24. The ESD protection circuit of claim 21 wherein the diodes in the plurality of diode sections have equal diode areas, and each of the diodes in the plurality of diode sections contributes equally to the protection of the protected circuit.
25. The ESD protection circuit of claim 21 wherein some of the diodes in the plurality of diode sections have unequal diode areas, and each of the diodes in the plurality of diode sections contributes equally to the protection of the protected circuit.
26. An electrostatic discharge (ESD) protection circuit for protecting a protected circuit, the ESD protection circuit comprising:
a first signal path;
a first return path connected to a source voltage;
a first plurality of voltage clamping sections each comprising a first voltage clamping device, the first plurality of voltage clamping sections having a signal end connected to the first signal path and a return end connected to the first return path, each of the first plurality of voltage clamping sections contributing equally to the protection of the protected circuit;
a second signal path;
a second return path connected to a drain voltage; and
a second plurality of voltage clamping sections each comprising a second voltage clamping device, the second plurality of voltage clamping sections having a signal end connected to the second signal path and a return end connected to the second return path, each of the second plurality of voltage clamping sections contributing equally to the protection of the protected circuit.