IP Library Granted Patent US 8,497,670
Granted Patent B1
US 8,497,670 · App. 13/720,589 · Granted Jul 30, 2013

Charge pump regulator circuit for powering a variable load

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Quick Facts
Patent No.
US 8,497,670
App. No.
13/720,589
Granted
Jul 30, 2013
Kind
B1
Abstract

A charge pump regulator circuit includes a voltage controlled oscillator and a plurality of charge pumps. The voltage controlled oscillator has a plurality of inverter stages connected in series in a ring. A plurality of oscillating signals is generated from outputs of the inverter stages. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive voltage. Each oscillating signal is phase shifted from a preceding oscillating signal. Each charge pump is connected to a corresponding one of the inverter stages to receive the oscillating signal produced by that inverter stage. Each charge pump outputs a voltage and current. The output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to the load.

Claims (32)

1. A charge pump regulator circuit that powers a variable load, the charge pump regulator circuit comprising: a voltage controlled oscillator comprising a plurality of inverter stages connected in series in a ring, each of the plurality of inverter stages producing an oscillating signal that is provided to a next one of the plurality of inverter stages, each oscillating signal having a frequency or amplitude that is variable dependent on a variable drive voltage; a plurality of charge pumps, each of the plurality of charge pump being connected to a corresponding one of the plurality of inverter stages to receive the oscillating signal produced by the corresponding inverter stage, the plurality of charge pumps outputting a current at about a voltage level to the variable load; and a feedback loop that provides the variable drive voltage that powers the plurality of inverter stages, a change in the variable drive voltage causing the plurality of inverter stages to change the frequency or the amplitude of the oscillating signal of each of the plurality of inverter stages, which causes a change in a level of the current provided to the variable load by each charge pump of the plurality of charge pumps while attempting to maintain the voltage level thereof.

2. The charge pump regulator circuit of claim 1 , wherein:

both the frequency and amplitude of the oscillating signals are variable dependent on the variable drive voltage.

3. The charge pump regulator circuit of claim 2 , wherein:

the voltage and current output by the charge pumps is dependent on the frequency and amplitude of the oscillating signals.

4. The charge pump regulator circuit of claim 2 , wherein:

when the drive voltage provided to the inverter stages is reduced, the frequency and amplitude of the oscillating signals are reduced; and

when the drive voltage provided to the inverter stages is increased, the frequency and amplitude of the oscillating signals are increased.

5. The charge pump regulator circuit of claim 4 , wherein:

when the frequency and amplitude of the oscillating signals are reduced, a noise level in the current and voltage provided to the load by the charge pumps is reduced; and

when the frequency and amplitude of the oscillating signals are increased, the noise level in the current and voltage provided to the load by the charge pumps is increased.

6. The charge pump regulator circuit of claim 1 , wherein:

each charge pump comprises a plurality of charge pump stages arranged in series; and

each oscillating signal forms a positive oscillating signal and a negative oscillating signal that are applied in an alternating manner to consecutive charge pump stages.

7. The charge pump regulator circuit of claim 1 , wherein:

each oscillating signal is phase shifted from a previous one of the oscillating signals in the ring.

8. The charge pump regulator circuit of claim 7 , wherein:

the output of each charge pump is phase shifted from the outputs of other charge pumps.

9. The charge pump regulator circuit of claim 1 , wherein:

the charge pumps are arranged in parallel.

10. A charge pump regulator circuit that powers a variable load, the circuit comprising: a voltage controlled oscillator comprising a plurality of inverter stages connected in series in a ring, each of the plurality of inverter stages producing an oscillating signal that is provided to a next one of the plurality of inverter stages, each oscillating signal being phase shifted from a preceding oscillating signal; a plurality of charge pumps arranged in parallel, each charge pump being connected to a corresponding one of the plurality of inverter stages to receive the oscillating signal produced by the corresponding inverter stage of the plurality of inverter stages, each charge pump of the plurality of charge pumps outputting a voltage and a current, output of each charge pump of the plurality of charge pumps being phase shifted from outputs of other charge pumps of the plurality of charge pumps, a combination of the currents of the plurality of charge pumps thus produced being provided at about a voltage level to the variable load; and a feedback loop that provides a drive voltage that powers the plurality of inverter stages, a change in the drive voltage causing the plurality of inverter stages to change a frequency or an amplitude of the oscillating signal of each of the plurality of inverter stages, which causes a change in a level of the voltage and the current provided to the variable load by each charge pump of the plurality of charge pumps while attempting to maintain the voltage level thereof.

11. The charge pump regulator circuit of claim 10 , wherein:

each charge pump comprises a plurality of charge pump stages arranged in series; and

each oscillating signal forms a positive oscillating signal and a negative oscillating signal that are applied in an alternating manner to consecutive charge pump stages.

12. The charge pump regulator circuit of claim 10 , wherein:

the change in the drive voltage causes the inverter stages to change both the frequency and the amplitude of the oscillating signals.

13. The charge pump regulator circuit of claim 12 , wherein:

when the frequency and amplitude of the oscillating signals are reduced, a noise level in the current and voltage provided to the load by the charge pumps is reduced; and

when the frequency and amplitude of the oscillating signals are increased, the noise level in the current and voltage provided to the load by the charge pumps is increased.

14. The charge pump regulator circuit of claim 12 , wherein:

when the drive voltage provided to the inverter stages is reduced, the frequency and amplitude of the oscillating signals are reduced; and

when the drive voltage provided to the inverter stages is increased, the frequency and amplitude of the oscillating signals are increased.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2016
From: QUALCOMM SWITCH CORP.
To: QUALCOMM INCORPORATED
Reel/Frame 038794/0663 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS PATENT NUMBER 9029901 TO THE CORRECT PATENT NO. 9029201 AS PREVIOUSLY RECORDED ON REEL 036812 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE TERMINATION AND RELEASE OF GRANT OF SECURITY INTEREST AGAINST ALL PATENTS SET FORTH HEREIN. Recorded Oct 20, 2015
From: HSBC BANK AUSTRALIA LIMITED ABN 48 006 434 162
To: SILANNA SEMICONDUCTOR U.S.A., INC. (FORMERLY KNOWN AS IO SEMICONDUCTOR)
Reel/Frame 036907/0785 →
CHANGE OF NAME Recorded Oct 16, 2015
From: SILANNA SEMICONDUCTOR U.S.A., INC.
To: QUALCOMM SWITCH CORP.
Reel/Frame 036877/0140 →
TERMINATION AND RELEASE OF GRANT OF SECURITY INTEREST (PATENTS) Recorded Oct 7, 2015
From: HSBC BANK AUSTRALIA LIMITED ABN 48 006 434 162
To: SILANNA SEMICONDUCTOR U.S.A., INC. (FORMERLY KNOWN AS IO SEMICONDUCTOR)
Reel/Frame 036812/0429 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME IN THE ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED AT REEL: 035901 FRAME: 0648. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 21, 2015
From: MOLIN, STUART B; LOU, PERRY; KEMERLING, CLINT
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036148/0418 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033134 FRAME: 0338. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Jul 15, 2015
From: IO SEMICONDUCTOR INCORPORATED
To: SILANNA SEMICONDUCTOR U.S.A., INC.
Reel/Frame 036109/0237 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2015
From: MOLIN, STUART B.; LOU, PERRY; KEMERLING, CLINT
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 035901/0648 →
CHANGE OF NAME Recorded Jun 11, 2014
From: IO SEMICONDUCTOR, INC.
To: SILANNA SEMICONDUCTOR U.S.A., INC.
Reel/Frame 033134/0338 →
SECURITY AGREEMENT Recorded Feb 4, 2013
From: IO SEMICONDUCTOR INCORPORATED
To: HSBC BANK AUSTRALIA LIMITED
Reel/Frame 029751/0726 →