IP Library Assignment 036877/0140
Patent Assignment
Reel/Frame 036877/0140

Change of Name

Recorded: 2015-10-16 Pages: 6
Assignor
SILANNA SEMICONDUCTOR U.S.A., INC.
Executed: 2015-10-05
Assignee
QUALCOMM SWITCH CORP.
4795 EASTGATE MALL, SUITE 100, SAN DIEGO, CALIFORNIA, 92121
Covered Properties (68)
Semiconductor-On-Insulator Integrated Circuit with Interconnect Below the Insulator
Bonded Semiconductor Structure with Sigec Layer as Etch Stop
Semiconductor Structure with Multiple Active Layers in an Soi Wafer
Semiconductor Device with Self-Aligned Back Side Features
Emi Shield for High Frequency Layer Transferred Devices
Schottky Clamped Radio Frequency Switch
Semiconductor-On-Insulator with Back Side Connection
Patent: 8,232,597 →
Application: 12/836,506 →
Publication: US 2011/0012669
Semiconductor-On-Insulator with Back Side Support Layer
Patent: 9,034,732 →
Application: 12/836,510 →
Publication: US 2011/0012223
Semiconductor-On-Insulator with Back Side Heat Dissipation
Patent: 9,029,201 →
Application: 12/836,559 →
Publication: US 2011/0012199
Vertical Semiconductor Device with Thinned Substrate
Patent: 8,426,888 →
Application: 13/270,335 →
Publication: US 2012/0086045
Vertical Semiconductor Device with Thinned Substrate
Patent: 8,426,258 →
Application: 13/270,339 →
Publication: US 2012/0088339
Thermal Conduction Paths for Semiconductor Structures
Patent: 8,466,054 →
Application: 13/311,454 →
Publication: US 2012/0146193
Trap Rich Layer for Semiconductor Devices
Patent: 8,466,036 →
Application: 13/313,231 →
Publication: US 2012/0161310
Semiconductor-On-Insulator with Back Side Strain Inducing Material
Patent: 9,748,272 →
Application: 13/452,836 →
Publication: US 2012/0205725
Semiconductor-On-Insulator with Back Side Connection
Patent: 8,357,975 →
Application: 13/459,110 →
Publication: US 2012/0211835
Charge Pump Regulator Circuit with a Variable Drive Voltage Ring Oscillator
Patent: 9,041,370 →
Application: 13/544,815 →
Publication: US 2014/0009135
Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
Patent: 8,481,405 →
Application: 13/652,240 →
Publication: US 2013/0037922
Trap Rich Layer Formation Techniques for Semiconductor Devices
Patent: 8,536,021 →
Application: 13/684,623 →
Publication: US 2013/0084689
Charge Pump Regulator Circuit
Patent: 8,497,670 →
Application: 13/720,589 →
Thin Integrated Circuit Chip-on-Board Assembly and Method of Making
Patent: 8,921,168 →
Application: 13/725,245 →
Publication: US 2014/0035129
Integrated Circuit Assembly and Method of Making
Patent: 8,912,646 →
Application: 13/725,306 →
Publication: US 2013/0134585
Back-To-Back Stacked Integrated Circuit Assembly and Method of Making
Patent: 9,390,974 →
Application: 13/725,403 →
Publication: US 2014/0175637
Semiconductor-on-Insulator with Back Side Body Connection
Patent: 8,859,347 →
Application: 13/746,288 →
Publication: US 2013/0130479
Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
Patent: 8,581,398 →
Application: 13/762,257 →
Publication: US 2013/0147061
Semiconductor-On-Insulator Integrated Circuit with Interconnect Below the Insulator
Patent: 8,748,245 →
Application: 13/851,926 →
Vertical Semiconductor Device with Thinned Substrate
Patent: 8,928,068 →
Application: 13/857,136 →
Publication: US 2013/0228855
Double-Sided Vertical Semiconductor Device with Thinned Substrate
Patent: 9,159,825 →
Application: 13/860,371 →
Publication: US 2013/0221433
Compact Level Shifter
Patent: 8,975,943 →
Application: 13/904,941 →
Publication: US 2014/0354342
Methods for the Formation of a Trap Rich Layer
Patent: 8,835,281 →
Application: 13/919,947 →
Publication: US 2013/0280884
Charge Pump Regulator Circuit with Variable Amplitude Control
Patent: 9,081,399 →
Application: 13/937,201 →
Publication: US 2014/0009136
Trap Rich Layer Formation Techniques for Semiconductor Devices
Patent: 9,064,697 →
Application: 14/013,000 →
Publication: US 2013/0344680
Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
Patent: 9,558,951 →
Application: 14/043,764 →
Publication: US 2014/0030871
Bonded Semiconductor Structure with Sigec Layer as Etch Stop
Patent: 9,105,689 →
Application: 14/223,060 →
Semiconductor-On-Insulator Integrated Circuit with Interconnect Below the Insulator
Patent: 9,530,796 →
Application: 14/272,261 →
Publication: US 2014/0291860
High Density Single-Transistor Antifuse Memory Cell
Patent: 9,496,270 →
Application: 14/292,395 →
Publication: US 2015/0348979
Redistribution Layer Contacting First Wafer Through Second Wafer
Patent: 9,754,860 →
Application: 14/326,304 →
Publication: US 2014/0319698
Semiconductor-on-Insulator Integrated Circuit with Reduced Off-State Capacitance
Patent: 9,331,098 →
Application: 14/335,906 →
Publication: US 2014/0327077
Semiconductor-On-Insulator Integrated Circuit with Back Side Gate
Patent: 9,466,536 →
Application: 14/451,342 →
Publication: US 2014/0342529
Semiconductor Device with Self-Aligned Back Side Features
Patent: 9,515,181 →
Application: 14/453,595 →
Publication: US 2016/0042967
Emi Shield for High Frequency Layer Transferred Devices
Patent: 9,786,613 →
Application: 14/454,204 →
Publication: US 2016/0043044
Semiconductor Structure with Multiple Active Layers in an Soi Wafer
Application: 14/454,262 →
Publication: US 2016/0043108
Forming Semiconductor Structure with Device Layers and Trl
Patent: 9,624,096 →
Application: 14/454,370 →
Publication: US 2014/0346622
Integrated Phase Change Switch
Patent: 9,362,492 →
Application: 14/468,074 →
Publication: US 2016/0056373
Methods for the Formation of a Trap Rich Layer
Patent: 9,153,434 →
Application: 14/478,446 →
Publication: US 2014/0377908
Schottky Clamped Radio Frequency Switch
Patent: 9,177,968 →
Application: 14/491,783 →
Low Power Externally Biased Power-on-Reset Circuit
Patent: 9,397,654 →
Application: 14/510,989 →
Publication: US 2016/0105169
Semiconductor Structure with Active Device and Damaged Region
Patent: 9,780,117 →
Application: 14/521,327 →
Publication: US 2016/0118406
Semiconductor-on-Insulator with Back Side Strain Topology
Patent: 9,466,719 →
Application: 14/540,268 →
Publication: US 2015/0069511
Integrated Circuit Assembly and Method of Making
Patent: 9,412,644 →
Application: 14/572,580 →
Publication: US 2015/0140782
Vertical Semiconductor Device with Thinned Substrate
Patent: 9,673,219 →
Application: 14/576,122 →
Publication: US 2015/0102401
Thin Integrated Circuit Chip-on-Board Assembly
Patent: 9,368,468 →
Application: 14/586,668 →
Publication: US 2015/0108640
Integrated Circuit Assembly with Faraday Cage
Patent: 9,478,507 →
Application: 14/596,515 →
Publication: US 2015/0137307
Semiconductor Structure with Trl and Handle Wafer Cavities
Patent: 9,553,013 →
Application: 14/633,024 →
Publication: US 2015/0179505
Rf Circuit with Switch Transistor with Body Connection
Patent: 9,503,074 →
Application: 14/640,377 →
Publication: US 2016/0261262
Bonded Semiconductor Structure with Sigec/Sigebc Layer as Etch Stop
Patent: 9,269,608 →
Application: 14/673,309 →
Publication: US 2015/0270161
Rf Circuit with Switch Transistor with Body Connection
Patent: 9,900,001 →
Application: 14/694,707 →
Publication: US 2016/0261265
Etch Stop Region Based Fabrication of Bonded Semiconductor Structures
Patent: 9,466,729 →
Application: 14/707,367 →
Semiconductor-On-Insulator with Back Side Support Layer
Patent: 9,496,227 →
Application: 14/707,998 →
Publication: US 2015/0249056
Bulk Layer Transfer Wafer with Multiple Etch Stop Layers
Patent: 9,704,738 →
Application: 14/740,505 →
Publication: US 2016/0372364
Trap Rich Layer Formation Techniques for Semiconductor Devices
Patent: 9,515,139 →
Application: 14/746,398 →
Publication: US 2015/0287783
Charge Pump Regulator Circuit
Patent: 9,385,595 →
Application: 14/789,745 →
Publication: US 2015/0303794
Conductive Seal Ring for Power Bus Distribution
Patent: 9,881,881 →
Application: 14/809,141 →
Publication: US 2017/0025368
Double-Sided Vertical Semiconductor Device with Thinned Substrate
Application: 14/824,491 →
Publication: US 2015/0364597
Trap Rich Layer for Semiconductor Devices
Patent: 9,570,558 →
Application: 14/855,652 →
Publication: US 2016/0035833
Low Capacitance Integrated Circuit for Rf Applications
Application: 61/225,914 →
Low Capacitance Vertical Power Device
Application: 61/392,419 →
Thermal Conduction Paths for SOI Structures
Application: 61/422,650 →
Trip Rich Layer for SOI Devices
Application: 61/427,167 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jun 24, 2015
From: MOLIN, STUART B.; LOU, PERRY; KEMERLING, CLINT
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 035901/0648 →
Change of Name Jun 24, 2015
From: IO SEMICONDUCTOR INCORPORATED
To: SILANNA SEMICONDUCTOR U.S.A., INC.
Reel/Frame 036016/0670 →
Assignment of Assignor's Interest Jun 24, 2015
From: FANELLI, STEPHEN A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 035894/0681 →
Assignment of Assignor's Interest Jun 24, 2015
From: STUBER, MICHAEL A.; MOLIN, STUART B.; BRINDLE, CHRIS
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 035897/0602 →
Assignment of Assignor's Interest Jun 24, 2015
From: STUBER, MICHAEL A.; MOLIN, STUART B.; NYGAARD, PAUL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 035901/0612 →
Assignment of Assignor's Interest Jun 24, 2015
From: NYGAARD, PAUL A.; MOLIN, STUART B.; STUBER, MICHAEL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 035901/0625 →
Assignment of Assignor's Interest Jul 9, 2015
From: STUBER, MICHAEL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036045/0625 →
Corrective Assignment to Correct the Assignor Name Previously Recorded at Reel: 033134 Frame: 0338. Assignor(S) Hereby Confirms the Change of Name. Jul 15, 2015
From: IO SEMICONDUCTOR INCORPORATED
To: SILANNA SEMICONDUCTOR U.S.A., INC.
Reel/Frame 036109/0237 →
Corrective Assignment to Correct the Assignee's Name Previously Recorded at Reel: 035894 Frame: 0681. Assignor(S) Hereby Confirms the Assignment. Jul 15, 2015
From: FANELLI, STEPHEN A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036107/0112 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 027059 Frame: 0200. Assignor(S) Hereby Confirms the Assignment. Jul 20, 2015
From: MOLIN, STUART B.; STUBER, MICHAEL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0956 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 027337 Frame: 0346. Assignor(S) Hereby Confirms the Assignment. Jul 20, 2015
From: STUBER, MICHAEL A.; BRINDLE, CHRIS; MOLIN, STUART B.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036139/0014 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 024694 Frame: 0303. Assignor(S) Hereby Confirms the Assignment. Jul 20, 2015
From: NYGAARD, PAUL A.; MOLIN, STUART B.; STUBER, MICHAEL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0807 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 024694 Frame 0315. Assignor(S) Hereby Confirms the Assignee Name Should Be "Io Semiconductor Incorporated". Jul 20, 2015
From: STUBER, MICHAEL A.; MOLIN, STUART B.; NYGAARD, PAUL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0857 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 035901 Frame 0612. Assignor(S) Hereby Confirms the Assignee Name Should Be "Io Semiconductor Incorporated". Jul 20, 2015
From: STUBER, MICHAEL A.; MOLIN, STUART B.; NYGAARD, PAUL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0868 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 035901 Frame: 0625. Assignor(S) Hereby Confirms the Assignment. Jul 20, 2015
From: NYGAARD, PAUL A.; MOLIN, STUART B.; STUBER, MICHAEL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0887 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 029521 Frame 0836. Assignor(S) Hereby Confirms the Assignee Name Should Be "Io Semiconductor Incorporated". Jul 20, 2015
From: STUBER, MICHAEL A.; MOLIN, STUART B.; DRUCKER, MARK; FOWLER, PETER
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0906 →
Corrective Assignment to Correct the Assignee Name in the Assignment Document Previously Recorded at Reel: 029522 Frame: 0121. Assignor(S) Hereby Confirms the Assignment. Jul 20, 2015
From: STUBER, MICHAEL A.; MOLIN, STUART B.; DRUCKER, MARK; FOWLER, PETER
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0930 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 027059 Frame: 0203. Assignor(S) Hereby Confirms the Assignment. Jul 20, 2015
From: MOLIN, STUART B.; STUBER, MICHAEL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036138/0978 →
Corrective Assignment to Correct the Assignee Name in the Assignment Document Previously Recorded at Reel: 035901 Frame: 0648. Assignor(S) Hereby Confirms the Assignment. Jul 21, 2015
From: MOLIN, STUART B; LOU, PERRY; KEMERLING, CLINT
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036148/0418 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 035897 Frame 0602. Assignor(S) Hereby Confirms the Assignee Name Should Be "Io Semiconductor Incorporated". Jul 21, 2015
From: STUBER, MICHAEL A.; MOLIN, STUART B.; BRINDLE, CHRIS
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036148/0541 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 027361 Frame 0345. Assignor(S) Hereby Confirms the Assignee Name Should Be "Io Semiconductor Incorporated". Jul 21, 2015
From: BRINDLE, CHRIS; STUBER, MICHAEL A.; MOLIN, STUART B.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036148/0294 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 029347 Frame 0034. Assignor(S) Hereby Confirms the Assignee Name Should Be "Io Semiconductor Incorporated". Jul 21, 2015
From: ARRIAGADA, ANTON; STUBER, MICHAEL A.; MOLIN, STUART B.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036148/0390 →
Corrective Assignment to Correct the Assignee Name in the Assignment Document Previously Recorded at Reel: 029131 Frame: 0822. Assignor(S) Hereby Confirms the Assignment. Jul 21, 2015
From: ARRIAGADA, ANTON; BRINDLE, CHRIS; STUBER, MICHAEL A.
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036148/0400 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 028752 Frame: 0792. Assignor(S) Hereby Confirms the Assignment. Jul 21, 2015
From: MOLIN, STUART B; LOU, PERRY; KEMERLING, CLINT
To: IO SEMICONDUCTOR INCORPORATED
Reel/Frame 036148/0498 →
Assignment of Assignor's Interest Aug 7, 2015
From: FANELLI, STEPHEN A.
To: SILANNA SEMICONDUCTOR U.S.A., INC.
Reel/Frame 036275/0995 →