Thin integrated circuit chip-on-board assembly

1. An integrated circuit assembly comprising:

an insulating layer of a semiconductor-on-insulator die having a first surface and a second surface, the first surface of the insulating layer being less than 10 microns below an upper plane of the integrated circuit assembly, wherein the insulating layer is a buried insulator of the semiconductor-on-insulator die;

an active layer of the semiconductor-on-insulator die contacting the first surface of the insulating layer;

a via hole through the insulating layer and into the active layer;

an electrically conductive material disposed within the via hole and physically contacting the active layer;

a metal bond pad formed on the second surface of the insulating layer;

wherein the metal bond pad is electrically connected to the active layer through the insulating layer by the electrically conductive material; and

a printed circuit board electrically connected to the metal bond pad;

wherein the insulating layer, active layer, metal bond pad and printed circuit board are located below the upper plane.

2. The assembly of claim 1 , wherein the printed circuit board is electrically connected with a solder bump to the active layer.

3. The assembly of claim 1 further comprising a thermal spreading layer coupled to the active layer.

4. The assembly of claim 3 , wherein the thermal spreading layer comprises metal.

5. The assembly of claim 3 , wherein the thermal spreading layer comprises one of copper, aluminum, gold, silver, or tungsten.

6. The assembly of claim 1 , wherein the second surface of the insulating layer is less than 5 microns below the upper plane of the integrated circuit assembly.

7. The assembly of claim 1 , wherein the second surface of the insulating layer is less than 2 microns below the upper plane of the integrated circuit assembly.

8. The assembly of claim 1 , wherein the active layer includes passive devices.