IP Library Granted Patent US 9,000,586
Granted Patent B2
US 9,000,586 · App. 13/726,917 · Granted Apr 7, 2015

Semiconductor device and manufacturing method thereof

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Quick Facts
Patent No.
US 9,000,586
App. No.
13/726,917
Granted
Apr 7, 2015
Kind
B2
Abstract

Provided are a semiconductor device including an interposer having a relatively thin thickness without a through silicon via and a method of manufacturing the same. The method of manufacturing a semiconductor device includes forming an interposer including a redistribution layer and a dielectric layer on a dummy substrate, connecting a semiconductor die to the redistribution layer facing an upper portion of the interposer, encapsulating the semiconductor die by using an encapsulation, removing the dummy substrate from the interposer, and connecting a bump to the redistribution layer facing a lower portion of the interposer.

Claims (44)

1. A method of manufacturing a semiconductor device, the method comprising:

forming an interposer comprising a redistribution layer and a dielectric layer on a dummy substrate;

connecting a semiconductor die to the redistribution layer facing an upper portion of the interposer;

encapsulating the semiconductor die in an encapsulant;

removing the dummy substrate from the interposer; and

thinning the encapsulant.

2. The method as claimed in claim 1 , wherein the dummy substrate comprises at least one of: silicon and/or glass.

3. The method as claimed in claim 1 , wherein the dielectric layer comprises at least one of: a silicon oxide layer, a silicon nitride layer, and/or a polymer layer.

4. The method as claimed in claim 1 , comprising forming a solder on the redistribution layer facing the upper portion of the interposer, and wherein said connecting a semiconductor die comprises connecting the semiconductor die to the solder.

5. The method as claimed in claim 1 , comprising, after said connecting the semiconductor die, filling an underfill between the semiconductor die and the interposer.

6. The method as claimed in claim 1 , wherein said thinning the encapsulant comprises grinding the encapsulant to expose a top surface of the semiconductor die.

7. The method as claimed in claim 1 , wherein said removing the dummy substrate comprises grinding and etching the dummy substrate to expose a portion of the redistribution layer facing a lower portion of the interposer.

8. The method as claimed in claim 1 , comprising connecting a bump to the redistribution layer facing a lower portion of the interposer, said connecting a bump comprising:

forming an under bump metal on the redistribution layer facing the lower portion of the interposer; and connecting the bump to the under bump metal.

9. The method as claimed in claim 1 , wherein said forming the interposer comprises forming an under bump metal on which at least a portion of the redistribution layer will be formed.

10. The method as claimed in claim 8 , comprising mounting the connected bump to a circuit board.

11. The method as claimed in claim 10 , comprising filling an underfill between the interposer and the circuit board.

12. The method as claimed in claim 10 , comprising attaching a cover to the circuit board to cover the semiconductor die.

13. The method as claimed in claim 1 , wherein said forming the interposer comprises:

forming a seed layer directly on the dummy substrate;

forming and patterning the redistribution layer on the seed layer;

forming the dielectric layer outside the redistribution layer; and

removing the seed layer.

14. The method as claimed in claim 1 , wherein the forming of the interposer comprises:

forming a seed layer on the dummy substrate;

forming an under bump metal directly on at least a portion of the seed layer;

forming and patterning the redistribution layer on the under bump metal;

forming the dielectric layer outside the redistribution layer; and

removing the at least a portion of the seed layer on which the under bump metal was directly formed.

15. The method as claimed in claim 14 , wherein said removing the at least a portion of the seed layer is performed after said removing the dummy substrate.

16. A method of manufacturing a semiconductor device, the method comprising:

forming an interposer comprising a redistribution layer and a dielectric layer on a dummy substrate; and

removing the dummy substrate from the interposer, wherein said removing the dummy substrate comprises grinding the dummy substrate.

17. The method as claimed in claim 16 , wherein said removing the dummy substrate comprises grinding and etching the dummy substrate to expose a portion of the redistribution layer.

18. The method as claimed in claim 16 , wherein said forming the interposer comprises forming an under bump metal on which at least a portion of the redistribution layer will be formed.

19. A method of manufacturing a semiconductor device, the method comprising:

forming an interposer comprising:

a redistribution layer and a dielectric layer; and

an under bump metal on which at least a portion of the redistribution layer is formed;

connecting a semiconductor die to the redistribution layer facing an upper portion of the interposer;

encapsulating the semiconductor die by using an encapsulant;

thinning the encapsulant to expose a top surface of the semiconductor die; and

connecting a bump to the under bump metal.

20. The method as claimed in claim 19 , wherein said forming comprises forming the redistribution layer and the dielectric layer on a dummy substrate, the method comprising removing the dummy substrate from the interposer by, at least in part, grinding and etching the dummy substrate to expose a portion of the redistribution layer facing a lower portion of the interposer.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
PATENT SECURITY AGREEMENT Recorded May 7, 2015
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 035613/0592 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 26, 2012
From: DO, WON CHUL; PARK, DOO HYUN; PAEK, JONG SIK; LEE, JI HUN; SEO, SEONG MIN
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 029527/0471 →