IP Library Granted Patent US 9,099,525
Granted Patent B2
US 9,099,525 · App. 13/729,207 · Granted Aug 4, 2015

Blanket EPI super steep retrograde well formation without Si recess

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,099,525
App. No.
13/729,207
Granted
Aug 4, 2015
Kind
B2
Abstract

A method of forming SSRW FETs with controlled step height between a field oxide and epitaxially grown silicon and the resulting devices are provided. Embodiments include providing a SiN layer on a substrate, forming first, second, and third spaced STI regions of field oxide through the SiN layer and into the substrate, removing a top portion of the field oxide for each STI region by a controlled deglaze, removing the SiN layer, forming an n-type region in the substrate between the first and second STI regions and a p-type region in the substrate between the second and third STI regions, and epitaxially growing a Si based layer on the substrate over the n-type and p-type regions.

Claims (47)

1. A method comprising:

providing a sacrificial oxide layer on a substrate;

providing a silicon nitride (SiN) layer above the sacrificial oxide layer;

forming first, second, and third spaced shallow trench isolation (STI) regions of field oxide through the SiN layer and into the substrate;

removing a top portion of the field oxide for each STI region by a controlled deglaze;

removing the SiN layer;

forming an n-type region in the substrate between the first and second STI regions and a p-type region in the substrate between the second and third STI regions;

removing the sacrificial oxide layer by precleaning;

removing 4 nanometers (nm) of field oxide from each STI region during the precleaning; and

epitaxially growing, after the precleaning, a silicon (Si) based layer on the substrate over the n-type and the p-type regions.

2. The method according to claim 1 , further comprising performing chemical mechanical polishing (CMP) on the STI regions down to a top surface of the SiN layer prior to the controlled deglaze.

3. The method according to claim 1 , comprising removing 5 to 10 nm of field oxide by the controlled deglaze.

4. The method according to claim 3 , wherein the controlled deglaze comprises a SiCoNi etch or a hydrogen fluoride (HF) etch followed by a SiCoNi etch followed by another HF etch.

5. The method according to claim 3 , comprising epitaxially growing the Si based layer by:

epitaxially growing a carbon doped Si (Si:C) layer on the substrate to a thickness of 5 to 10 nm; and

epitaxially growing a Si layer on the Si:C to a thickness of 10 to 15 nm.

6. The method according to claim 3 , comprising epitaxially growing the Si based layer over the p-type region by:

forming a first hardmask on the sacrificial oxide layer between the first and the second STI regions after forming the n-type and the p-type regions;

removing the sacrificial oxide layer;

epitaxially growing the Si:C layer on the substrate over the p-type region; and

expitaxially growing the Si layer on the Si:C.

7. The method according to claim 6 , comprising epitaxially growing the Si layer to a thickness of 10 to 15 nm and epitaxially growing the Si:C layer to a thickness of 5 to 10 nm.

8. The method according to claim 6 , comprising epitaxially growing the Si based layer over the n-type region by:

forming a second hardmask on the Si layer over the p-type region;

removing the first hardmask from between the first and the second STI regions;

removing the sacrificial oxide from between the first and the second STI regions;

epitaxially growing a second Si layer on the substrate over the n-type region; and

removing the second hardmask.

9. The method according to claim 8 , comprising epitaxially growing the second Si layer to a thickness of 20 nm.

10. A method comprising:

providing a sacrificial oxide and a silicon nitride (SiN) layer on a substrate;

forming first, second, and third spaced shallow trench isolation (STI) regions of field oxide through the SiN layer, through the sacrificial oxide layer, and into the substrate;

chemical mechanical polishing (CMP) the STI regions down to a top surface of the SiN layer;

removing a top 5 to 10 nm of the field oxide for each STI region by a controlled deglaze leaving about 25 nm of field oxide above the substrate for each STI region;

removing the SiN layer by wet etching;

forming a phosphorus (P) n-type region in the substrate between the first and second STI regions and a boron (B) p-type in the substrate between the second and third STI regions; and

epitaxially growing a silicon (Si) based layer on the substrate over the p-type and n-type regions.

11. The method according to claim 10 , comprising epitaxially growing a Si:C layer on the substrate over the B p-type region and epitaxially growing a first Si layer on the P n-type region by:

forming a first hardmask on the sacrificial oxide layer between the second and the third STI regions after forming the p-type and n-type regions;

removing a portion of the sacrificial oxide layer from the p-type region leaving a remaining sacrificial oxide;

epitaxially growing the Si:C layer to a thickness of 5 to 10 nm on the substrate over the p-type region;

epitaxially growing the first Si layer to a thickness of 10 to 15 nm on the Si:C layer;

forming a second hardmask on the first Si layer;

removing the first hardmask;

removing the remaining sacrificial oxide;

epitaxially growing a second Si layer to a thickness of 20 nm on the substrate over the n-type region; and

removing the second hardmask.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049612/0211 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2012
From: KANG, LAEGU; VAKADA, VARA GOVINDESWARA REDDY; GANZ, MICHAEL; KHANNA, PUNEET; QI, YI; SAMAVEDAM, SRIKANTH; VEMULA, SRI CHARAN
To: GLOBALFOUNDRIES INC.
Reel/Frame 029546/0132 →