IP Library Granted Patent US 8,890,495
Granted Patent B2
US 8,890,495 · App. 13/748,598 · Granted Nov 18, 2014

Power supply for integrated circuit

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Quick Facts
Patent No.
US 8,890,495
App. No.
13/748,598
Granted
Nov 18, 2014
Kind
B2
Abstract

A power supply that provides a supply voltage to an integrated circuit (IC) includes high and low power regulators and a power management circuit. The high power regulator regulates the supply voltage at a first voltage level and the low power regulator is set to an inactive mode when the IC is in a RUN mode. When the IC transitions from the RUN mode to a STOP mode, the high power regulator stops regulating and the supply voltage is maintained at a second voltage level, while the lower power regulator is set to an active mode for regulating the supply voltage at a third voltage level. A fallback signal is generated when the supply voltage drops below a first threshold value after which the low power regulator is set in the inactive mode and the high power regulator is configured to regulate the supply voltage at a fourth voltage level.

Claims (35)

1. A power supply for providing a supply voltage to an integrated circuit, comprising:

a high power regulator that regulates the supply voltage at a first voltage level when the integrated circuit is in a RUN mode and wherein the supply voltage is maintained at a second voltage level when the integrated circuit transitions from the RUN mode to a STOP mode;

a low power regulator that is set in an inactive mode when the integrated circuit is in the RUN mode, and regulates the supply voltage at a third voltage level when the integrated circuit transitions from the RUN mode to the STOP mode; and

a power management circuit, connected to the high and low power regulators, and including:

a first voltage monitoring circuit that monitors the supply voltage regulated by the low power regulator when the integrated circuit transitions from the RUN mode to the STOP mode and generates a fallback signal when the supply voltage regulated by the low power regulator drops below a first voltage threshold; and

a control circuit that sets the low power regulator in the inactive mode and configures the high power regulator to regulate the supply voltage at a fourth voltage level when the fallback signal is active during a predefined time period when the integrated circuit transitions from the RUN mode to the STOP mode, and wherein the control circuit switches off the high power regulator and configures the low power regulator to continue regulating the supply voltage at the third voltage level when the fallback signal is not active during the predefined time period.

2. The power supply of claim 1 , wherein the power management circuit further comprises a second voltage monitoring circuit for monitoring the supply voltage regulated by the high and low power regulators and generating a reset signal when the supply voltage drops below a second voltage threshold.

3. The power supply of claim 2 , wherein the control circuit resets the integrated circuit based on the reset signal.

4. The power supply of claim 2 , wherein the second voltage level is less than the third voltage level and greater than the second voltage threshold.

5. The power supply of claim 1 , wherein the control circuit further switches on the high power regulator to maintain the supply voltage at the second voltage level, sets the low power regulator in the inactive mode, and then configures the high power regulator to regulate the supply voltage at the fourth voltage level when the fallback signal is active during the predefined time period.

6. The power supply of claim 1 , wherein the power management circuit further includes a counter for tracking the predefined time period.

7. A power supply for providing a supply voltage to an integrated circuit, comprising:

a high power regulator that regulates the supply voltage at a first voltage level when the integrated circuit is in a RUN mode and maintains the supply voltage at a second voltage level when the integrated circuit transitions from the RUN mode to a STOP mode;

a low power regulator that is set in an inactive mode when the integrated circuit is in the RUN mode, and regulates the supply voltage at a third voltage level when the integrated circuit transitions from the RUN mode to the STOP mode; and

a power management circuit, connected to the high and low power regulators, comprising:

a first voltage monitoring circuit that monitors the supply voltage regulated by the low power regulator when the integrated circuit transitions from the RUN mode to the STOP mode and generates a fallback signal when the supply voltage regulated by the low power regulator drops below a first voltage threshold; and

a control circuit that sets the low power regulator in the inactive mode, and configures the high power regulator to regulate the supply voltage at a fourth voltage level when the fallback signal is active during a predefined time period when the integrated circuit transitions from the RUN mode to the STOP mode, and

wherein the control circuit switches off the high power regulator and configures the low power regulator to continue regulating the supply voltage at the third voltage level when the fallback signal is not active during the predefined time period, and

wherein the control circuit switches on and maintains the high power regulator at the second voltage level, sets the low power regulator in the inactive mode, and configures the high power regulator to regulate the supply voltage at the fourth voltage level when the fallback signal is active after the predefined time period.

8. The power supply of claim 7 , wherein the power management circuit further comprises a second voltage monitoring circuit for monitoring the supply voltage regulated by the high and low power regulators and generating a reset signal when the supply voltage drops below a second voltage threshold.

9. The power supply of claim 8 , wherein the control circuit resets the integrated circuit based on the reset signal.

10. The power supply of claim 8 , wherein the second voltage level voltage is less than the third voltage level and greater than the second voltage threshold.

11. The power supply of claim 7 , wherein the power management circuit further comprises a counter connected to the control circuit and the first voltage monitoring circuit for tracking the predefined time period.

12. A method for providing a supply voltage to an integrated circuit by a power supply, wherein the power supply includes a high power regulator configured to regulate the supply voltage at a first voltage level when the integrated circuit is in a RUN mode and a low power regulator that is set in an inactive mode when the integrated circuit is in the RUN mode, the method comprising:

the high power regulator maintaining the supply voltage at a second voltage level when the integrated circuit transitions from the RUN mode to a STOP mode;

configuring the low power regulator to regulate the supply voltage at a third voltage level when the integrated circuit transitions from the RUN mode to the STOP mode;

monitoring the supply voltage regulated by the low power regulator when the integrated circuit transitions from the RUN mode to the STOP mode;

generating a fallback signal when the supply voltage regulated by the low power regulator drops below a first voltage threshold;

setting the low power regulator in the inactive mode and configuring the high power regulator to regulate the supply voltage at a fourth voltage level when the fallback signal is active during a predefined time period when the integrated circuit transitions from the RUN mode to the STOP mode; and

switching off the high power regulator and configuring the low power regulator to continue regulating the supply voltage at the third voltage level when the fallback signal is inactive during the predefined time period.

13. The method of claim 12 , further comprising monitoring the supply voltage regulated by the low and high power regulators and generating a reset signal when the supply voltage drops below a second voltage threshold.

14. The method of claim 13 , further comprising resetting the integrated circuit based on the reset signal.

15. The method of claim 13 , wherein the second voltage level voltage is less than the third voltage level and greater than the second voltage threshold.

16. The method of claim 12 , further comprising switching on the high power regulator and maintaining the supply voltage at the second voltage level when the fallback signal is active after the predefined time period.

17. The method of claim 16 , further comprising setting the low power regulator in the inactive mode and configuring the high power regulator to regulate the supply voltage at the fourth voltage level when the fallback signal is active after the predefined time period.

Assignments (21)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0704 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0744 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0725 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2013
From: SINHA, SAMAKSH; SHARDA, GARIMA; THAKUR, NISHANT SINGH
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 029682/0822 →