IP Library › Granted Patent US 9,130,156
Granted Patent B2
US 9,130,156 · App. 13/763,318 · Granted Sep 8, 2015

Process to remove film from semiconductor devices

Inventors: Chern-Yow Hsu (Chu-Bei, TW); Shih-Chang Liu (Alian Township, TW); Chia-Shiung Tsai (Hsin-Chu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L43/12
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Quick Facts
Patent No.
US 9,130,156
App. No.
13/763,318
Granted
Sep 8, 2015
Kind
B2
Abstract

Embodiments of the present disclosure are a method of forming a semiconductor device, a method of forming an MRAM device, and a method of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a second layer over a first layer, and performing a first etch process on the second layer to define a feature, wherein the first etch process forms a film on a surface of the feature. The method further comprises performing an ion beam etch process on the feature, wherein the ion beam etch removes the film from the surface of the feature.

Claims (46)

1. A method comprising:

forming a magnetic tunnel junction (MTJ) over a conductive bottom electrode;

forming a conductive top electrode having a first width directly on the MTJ;

performing a first etch process on the MTJ to pattern the MTJ to the first width, the first etch process forming films on surfaces of the MTJ and the top electrode; and

performing an ion beam etch process on the MTJ and the top electrode, the ion beam etch process removing the films from the surfaces of the MTJ and the top electrode, wherein after the films are removed, the MTJ and the top electrode have a second width and third width, respectively, the second and third widths being less than the first width, the third width being less than the second width.

2. The method of claim 1 , wherein the ion beam etch process has an ion beam voltage between about 100 V and about 200 V.

3. The method of claim 1 , wherein the first etch process is a dry plasma etch process.

4. The method of claim 1 further comprising after the performing the ion beam etch process, depositing a dielectric layer over the MTJ and the top electrode.

5. A method of forming an magnetic random access memory (MRAM) device, the method comprising:

forming a magnetic tunnel junction (MTJ) over a bottom electrode, wherein the forming an MTJ further comprises:

forming an anti-ferromagnetic material (AFM) layer over the bottom electrode;

forming a pinned layer over the AFM layer;

forming a barrier layer over the pinned layer; and

forming a free layer over the barrier layer;

forming a top electrode directly on the free layer, the top electrode being conductive;

patterning the top electrode and the MTJ with a first etch process, wherein the first etch process forms a film on the top electrode and the MTJ; and

performing an ion beam etch process on the top electrode and the MTJ, wherein the ion beam etch process removes the film, wherein after the performing the ion beam etch process, the top electrode has a first width and the MTJ has a second width, the second width being larger than the first width.

6. The method of claim 5 , wherein the ion beam etch process has an ion beam focus voltage between about 500 V and about 2000 V.

7. The method of claim 5 , wherein the ion beam etch process comprises an etchant gas from a group consisting essentially of as a CHF 2 , CHF 3 , or CHF 4 , Ar, O, N, or a combination thereof.

8. The method of claim 5 , wherein the film is on sidewalls of the MTJ and on sidewalls and a top surface of the top electrode.

9. The method of claim 5 further comprising after the performing the ion beam etch process, forming a dielectric layer over the bottom electrode, the MTJ, and the top electrode.

10. The method of claim 5 , wherein the patterning the top electrode and the MTJ with the first etch process further comprises:

patterning the top electrode in a first plasma dry etch step; and

patterning the MTJ in a second plasma dry etch step.

11. A method of forming an magnetic random access memory (MRAM) device, the method comprising:

forming a magnetic tunnel junction (MTJ) over a bottom electrode;

forming a top electrode over the MTJ;

patterning the top electrode and the MTJ, wherein the patterning the top electrode and the MTJ forms a film on the top electrode and the MTJ; and

performing an ion beam etch process on the top electrode and the MTJ, wherein the ion beam etch process removes the film, wherein after the performing the ion beam etch process, the top electrode has a first width and the MTJ has a second width, the second width being larger than the first width.

12. The method of claim 11 , wherein the forming the MTJ further comprises:

forming an anti-ferromagnetic material (AFM) layer over the bottom electrode;

forming a pinned layer over the AFM layer;

forming a barrier layer over the pinned layer; and

forming a free layer over the barrier layer.

13. The method of claim 12 , wherein the patterning the top electrode and the MTJ further comprises:

patterning the free layer, the barrier layer, and the pinned layer with a first etch process; and

patterning the AFM layer with a second etch process, the second etch process being a different process than the first etch process, wherein after the patterning the AFM layer with the second etch process, the AFM layer, the pinned layer, the barrier layer, and the free layer each have substantially coterminous sidewalls.

14. The method of claim 11 further comprising after the performing the ion beam etch process, forming a dielectric layer over the bottom electrode, the MTJ, and the top electrode.

15. The method of claim 11 , wherein the top electrode directly contacts the MTJ.

16. The method of claim 11 , wherein the ion beam etch process has an ion beam focus voltage between about 500 V and about 2000 V.

17. The method of claim 11 , wherein the ion beam etch process comprises an etchant gas from a group consisting essentially of as a CHF 2 , CHF 3 , or CHF 4 , Ar, O, N, or a combination thereof.

18. The method of claim 13 , wherein the first etch process is a dry plasma etch process, and wherein the second etch process is a dry plasma etch process.

19. The method of claim 11 , wherein the top electrode and the bottom electrode are each formed of a conductive material.

20. The method of claim 5 , wherein the patterning the top electrode and the MTJ with a first process further comprises:

patterning the free layer, the barrier layer, and the pinned layer with a first plasma dry etch process; and

patterning the AFM layer with a second plasma dry etch process, the second plasma dry etch process being a different process than the first dry etch process, wherein after the patterning the AFM layer with the second plasma dry etch process, the AFM layer, the pinned layer, the barrier layer, and the free layer each have substantially coterminous sidewalls.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2013
From: HSU, CHERN-YOW; LIU, SHIH-CHANG; TSAI, CHIA-SHIUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 029902/0369 →
Continuity (1)
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