Leadframe and semiconductor package made using the leadframe
Metal leadframes, semiconductor packages made using the leadframes, and methods of making the leadframes and packages are disclosed. In one embodiment, the leadframe includes a rectangular frame. A chip pad and a plurality of leads are within the frame. The lower side of the chip pad and the leads includes one or more vertically recessed horizontal surfaces. The upper side of the chip pad may include a groove around a chip mounting region. In a package, the chip pad supports a semiconductor chip electrically connected to the leads. The lower side of the chip pad and leads are exposed at an exterior surface of the package body. Encapsulant material underfills the recessed lower surfaces of the chip pad and leads, thereby locking them to the encapsulant material. A wire may be reliably bonded to the chip pad within the groove formed in the upper side thereof.
1. A semiconductor package structure comprising:
a chip pad having first and second opposed surfaces;
a plurality of leads each including an inner end adjacent to the chip pad, an opposite outer end, a first surface, a second surface opposite the first surface, a first recessed surface that is opposite the first surface and extends between the second surface and the outer end, and a second recessed surface that is opposite the first surface and extends between the second surface and the inner end, and wherein the second surface bisects the first recessed surface and the second recessed surface;
a semiconductor chip mounted on the first surface of the chip pad and in an electrical connection with at least some of the leads; and
a package body of a hardened encapsulant material over the chip, the first surfaces of the leads, and the second recessed surfaces of the leads, the package body defining a first exterior surface and an exterior side surface, wherein the second surface of each of the leads and the second surface of the chip pad are exposed through the first exterior surface of the package body, and wherein the outer ends of each of the plurality of leads are exposed through the exterior side surface.
2. The structure of claim 1 , wherein the first recessed surface of each lead begins at the outer end, and wherein the second surface of each of the leads and the second surface of the chip pad are substantially flush with the first exterior surface of the package body.
3. The structure of claim 2 , wherein the hardened encapsulant materials is over the first recessed surface of each lead, and wherein the second surface of the chip pad is devoid of outer terminals.
4. The structure of claim 2 , wherein the second recessed surface of each lead begins at the inner end, and wherein portions of each of the leads are exposed through the exterior side surfaces of the package body.
5. The structure of claim 1 , wherein the first recessed surface of each lead begins at the outer end, and wherein the first recessed surface of each lead is exposed in the plane of the exterior side surface and exposed in the plane of the first exterior surface.
6. The structure of claim 5 , wherein the outer end of each lead is substantially flush with the exterior first side.
7. The structure of claim 1 , wherein the chip pad has a third surface opposite a peripheral portion of the first surface of the chip pad and surrounding the second surface of the chip pad, the third surface being recessed from the second surface.
8. The structure of claim 1 , wherein the first surface of the chip pad includes a groove having a bottom surface, the groove extending in a ring adjacent to peripheral sides of the chip pad, at least one conductive wire is electrically connected between the semiconductor chip and the bottom surface within the groove, and wherein the groove is filled with the encapsulant material.
9. An electronic package structure comprising:
a chip pad having a first surface and a second surface opposite a central portion of the first surface;
a plurality of leads each including an inner end adjacent to the chip pad, an opposite outer end, a first surface, a second surface opposite the first surface a first recessed region that is opposite the first surface and that extends inward from the outer end, and a second recessed region that is opposite the first surface and that is between the second surface and the inner end, wherein the second surface bisects the first recessed region and the second recessed region;
an electronic chip mounted on the first surface of the chip pad and in an electrical connection with the first surface of at least some of the leads; and
a package body of an encapsulant material over the electronic chip, at least the first surface of the chip pad, the first surfaces of each of the leads, and the second recessed regions of each of the leads, wherein the second surface of each of the leads and the second surface of the chip pad are exposed through and are substantially flush with a first exterior surface of the package body, and wherein the outer ends of each of the leads are exposed through a first side exterior surface of the package body.
10. The structure of claim 9 , wherein the chip pad further includes a third recessed region opposite a peripheral portion of the first surface and surrounding the second surface, and wherein the third recessed region is covered by the encapsulant material, and wherein the second surface of the chip pad is devoid of terminal structures.
11. The structure of claim 10 , wherein the second recess region of each of the leads begins at the inner end thereof, and wherein portions of each of the leads are exposed through the exterior side surfaces of the package body.
12. The structure of claim 9 , wherein the outer end of each of the leads is substantially flush with the first side exterior surface of the package body.
13. The structure of claim 9 , wherein the first surface of the chip pad includes a groove having a bottom surface, the groove extending in a ring adjacent to peripheral sides of the chip pad, at least one conductive wire is electrically connected between the electronic chip and the bottom surface within the groove, and wherein the groove is filled with the encapsulant material.
14. The structure of claim 9 , wherein the encapsulant material is over the first recessed regions of the leads.
15. A semiconductor package structure comprising:
a chip pad having a first surface and a second surface opposite a central portion of the first surface;
a plurality of leads each including an inner end adjacent to the chip pad, an opposite outer end, a first surface, a second surface opposite the first surface a first recessed region that is opposite the first surface and that extends inward from the outer end, and a second recessed region that is opposite the first surface and that is between the inner end and the second surface, wherein the second surface extends completely between the first recessed region and the second recessed region so that no portion of the second recessed region extends between the second surface and the first recessed region;
a semiconductor chip mounted on the first surface of the chip pad and in an electrical connection with at least some of the leads; and
a package body of a hardened encapsulant material over the electronic chip, at least the first surface of the chip pad, the first surfaces of each of the leads, and the second recessed regions of each of leads, wherein the second surface of each of the leads and the second surface of the chip pad are exposed through an exterior surface of the package body, and wherein the outer ends of each of the leads are exposed through exterior side surfaces of the package body.
16. The structure of claim 15 , wherein the second recessed regions of each of the leads begins at the inner end.
17. The structure of claim 15 , wherein the first recessed regions of each of the leads are exposed through the exterior surface of the package body and further exposed through the exterior side surfaces of the package body.
18. The structure of claim 15 , wherein the chip pad includes a third surface opposite a peripheral portion of the first surface and surrounding the second surface, the third surface being recessed from the second surface.
19. The structure of claim 18 , wherein the first surface of the chip pad includes a groove bottomed by a fourth surface, the groove extending in a ring adjacent to peripheral sides of the chip pad.
20. The structure of claim 15 , wherein the encapsulant material is over the first recessed regions of each of the leads.