IP Library Granted Patent US 9,459,636
Granted Patent B2
US 9,459,636 · App. 13/774,340 · Granted Oct 4, 2016

Transition control for a hybrid switched-mode power supply (SMPS)

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Quick Facts
Patent No.
US 9,459,636
App. No.
13/774,340
Granted
Oct 4, 2016
Kind
B2
Abstract

Systems and methods for transition control in a hybrid Switched-Mode Power Supply (SMPS). In some embodiments, a hybrid SMPS may include linear circuitry configured to produce an output voltage proportional to a variable duty cycle when the SMPS operates in linear mode and hysteretic circuitry coupled to the linear circuitry, the hysteretic circuitry configured to cause the duty cycle to assume one of two predetermined values when the SMPS operates in hysteretic mode. The hybrid SMPS may also include transition circuitry coupled to the linear circuitry and to the hysteretic circuitry, the transition circuitry configured to bypass at least a portion of the linear circuitry in response to the hybrid SMPS transitioning from the hysteretic mode to the linear mode.

Claims (26)

1. A hybrid Switched-Mode Power Supply (SMPS), comprising:

linear circuitry configured to produce an output voltage proportional to a variable duty cycle when the SMPS operates in linear mode, the linear circuitry comprising an error amplifier configured to provide an error voltage at an output node based upon a comparison between a reference voltage received at a first input node and the output voltage received at a second input node;

hysteretic circuitry coupled to the linear circuitry, the hysteretic circuitry configured to cause the duty cycle to assume one of two predetermined values when the SMPS operates in hysteretic mode; and

transition control circuitry coupled to the linear circuitry and to the hysteretic circuitry, the transition control circuitry coupled to a first, second, and third switches configured to bypass at least a portion of the linear circuitry in response to the hybrid SMPS transitioning from the hysteretic mode to the linear mode by applying a hold signal to the first, second, and third switches, wherein the hold signal is configured to close the first and second switches to shortcut the first and second inputs nodes of the error amplifier, respectively, and wherein the hold signal is further configured to close the third switch to force the output node of the error amplifier to a selected voltage level.

2. The hybrid SMPS of claim 1 , wherein the hysteretic circuitry is configured to cause the duty cycle to assume a high predetermined value in response to the output voltage dropping below a low threshold value.

3. The hybrid SMPS of claim 1 , wherein the hysteretic circuitry is configured to cause the duty cycle to assume a low predetermined value in response to the output voltage rising above a high threshold value.

4. The hybrid SMPS of claim 1 , wherein the transition control circuitry is configured to identify an overvoltage or undervoltage condition with respect to the output voltage.

5. The hybrid SMPS of claim 4 , wherein in response to determining that the hybrid SMPS is operating in discontinuous current mode, the transition control circuitry is configured to cause a fixed voltage value produced by the digital voltage converter to be applied to the output node of the error amplifier via a fourth switch.

6. The hybrid SMPS of claim 4 , wherein in response to having identified a first overvoltage or undervoltage condition while the SMPS is operating in the hysteretic mode, the transition control circuitry is configured to produce a first control word translatable by a digital voltage converter into the selected voltage level applied to the output node of the error amplifier via the third switch.

7. The hybrid SMPS of claim 6 , wherein in response to having identified a second overvoltage condition following the first overvoltage condition and prior to expiration of an observation period, the transition control circuitry is configured to produce a second control word having a value smaller than the first control word and translatable by the digital voltage converter into another voltage level smaller than the selected voltage level, and wherein the transition control circuitry is further configured to apply the other voltage level to the output node of the error amplifier via the third switch.

8. The hybrid SMPS of claim 6 , wherein in response to having identified a second undervoltage condition following the first undervoltage condition and prior to expiration of an observation period, the transition control circuitry is configured to produce a second control word having a value higher than the first control word and translatable by the digital voltage converter into another voltage level greater than the selected voltage level, and wherein the transition control circuitry is further configured to apply the other voltage level to the output node of the error amplifier via the third switch.

9. A method of operating a hybrid Switched-Mode Power Supply (SMPS), the method comprising:

producing, while in a linear mode of operation, an output voltage that is proportional to a duty cycle;

entering a hysteretic mode of operation to cause the duty cycle to assume: (a) a first predetermined value in response to an undervoltage occurrence, or (b) a second predetermined value in response to an overvoltage occurrence;

during a return of the SMPS from the hysteric mode of operation to the linear mode of operation, averting transitions between the linear and hysteric modes of operation during a selected time period by issuing a hold signal, wherein the hold signal shortcuts a first input and a second input of an error amplifier within the hybrid SMPS by closing a first switch and a second switch, respectively, and wherein the hold signal further allows a digitally selected voltage to be applied to an output of the error amplifier by closing a third switch; and

gradually increasing or decreasing the digitally selected voltage in response to subsequent undervoltage or overvoltage occurrences taking place during the selected time period, respectively.

10. The method of claim 9 , further comprising, in response to the overvoltage occurrence, producing a first control word translatable into the digitally selected first voltage applied to the output of the error amplifier.

11. The method of claim 10 , further comprising, in response to a subsequent overvoltage occurrence taking place prior to expiration of the selected time period, producing a second control word different from the first control word and translatable into a second digitally selected voltage to be applied to the output of the error amplifier, the second digitally selected voltage lower than the digitally selected voltage.

12. The method of claim 10 , further comprising, in response to a subsequent overvoltage occurrence taking place after expiration of the selected time period, maintaining the first control word.

13. The method of claim 9 , further comprising, in response to the undervoltage occurrence, producing a first control word translatable into the digitally selected first voltage applied to the output of the error amplifier.

14. The method of claim 13 , further comprising, in response to a subsequent undervoltage occurrence taking place prior to expiration of the selected time period, producing a second control word different from the first control word and translatable into a second digitally selected voltage to be applied to the output of the error amplifier, the second digitally selected voltage higher than the digitally selected voltage.

15. The method of claim 13 , further comprising, in response to a subsequent undervoltage occurrence taking place after expiration of the selected time period, maintaining the first control word.

16. An electronic chip having a hybrid Switched-Mode Power Supply (SMPS), the electronic chip comprising:

a linear circuit;

a hysteretic circuit coupled to the linear circuit; and

a transition control circuit coupled to the linear circuit and to the hysteretic circuit, the transition circuit configured to control an output of the hybrid SMPS during the SMPS' transition from a hysteretic mode of operation to a linear mode of operation, wherein the linear circuit is configured to produce an output voltage proportional to a variable duty cycle when the hybrid SMPS operates in the linear mode, wherein the hysteretic circuit is configured to cause the duty cycle to assume one of two predetermined values when the hybrid SMPS operates in the hysteretic mode, wherein the transition control circuit is configured to bypass an error amplifier within the linear circuit by applying a hold signal configured to close a first switch and a second switch to shortcut inputs of the error amplifier, respectively, wherein the hold signal is further configured to close a third switch to force an output of the error amplifier to a digitally selected voltage level, and wherein the transition control circuit is further configured to gradually increase or decrease the digitally selected voltage level in response to subsequent undervoltage or overvoltage occurrences respectively taking place during an observation period while the SMPS transitions from the hysteretic mode of operation to the linear mode of operation.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
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To: NXP B.V.
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From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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