IP Library Granted Patent US 9,252,563
Granted Patent B1
US 9,252,563 · App. 13/787,351 · Granted Feb 2, 2016

Method and apparatus for driving a laser diode

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Quick Facts
Patent No.
US 9,252,563
App. No.
13/787,351
Granted
Feb 2, 2016
Kind
B1
Abstract

A method and apparatus for powering up and powering down a laser diode and its driver are disclosed. The disclosed method and apparatus enable the use of deep sub-micron CMOS technology to build a laser diode driver (LDD), while ensuring the low voltage limits prescribed by such technology are not exceeded. Building an LDD with deep sub-micron CMOS technology pushes circuit integration further ahead, bringing cost of LDDs and required board circuits down.

Claims (15)

1. A laser diode circuit comprising:

a laser diode having an anode and a cathode;

a laser diode driver including a first biasing current source, a second biasing current source, a first modulation current source, and a second modulation current source, the first biasing current source and the first modulation current source being connected to the anode of the laser diode at a first node and the second modulation current source being connected to the cathode of the laser diode at a second node;

a first laser diode biasing inductor with one end connected to the anode of the laser diode at the first node and another end connected to a voltage supply;

a second laser diode biasing inductor with one end connected to the cathode of the laser diode at the second node and another end connected the second biasing current source of the laser diode driver;

a modulator configured to control the modulating current of the laser diode by switching between a first modulation current and a second modulation current to modulate a light emitted by the laser diode, the first modulation current flowing through the first node and bypassing the laser diode, the second modulation current flowing through the laser diode and the second node;

at least one cascoded laser diode driver current source; and

a biasing current controller configured to control the biasing current of the laser diode by switching between a first biasing current to a second biasing current to bias the laser diode, the first biasing current flowing through the first node and bypassing the laser diode, and the second biasing current flowing through the laser diode and the second node, the biasing current controller being further configured to control the first biasing current and the second biasing current while adjusting bias levels of the at least one cascoded laser diode driver current source to prevent electrical overstress conditions on components of the laser driver circuit.

2. The laser diode circuit of claim 1 , wherein the modulator is further configured to modulate a light emitted by the laser diode in accordance with a digital pattern to be transmitted over an optical communication channel.

3. The laser diode circuit of claim 1 , wherein the biasing current controller is further configured to:

vary a rate of generation of the first biasing current over time, the rate of generation of the first biasing current being maintained within a first biasing threshold limit to prevent electrical overstress conditions on components of the laser driver circuit and to prevent spurious light emissions from the laser diode.

4. The laser diode circuit of claim 1 , wherein the modulator is further configured to:

vary a rate of generation of the first modulation current over time, the rate generation of the first modulation current being maintained within a first modulation threshold limit to prevent electrical overstress conditions on components of the laser driver circuit and to prevent spurious light emissions from the laser diode.

5. The laser diode circuit of claim 1 , wherein the biasing current controller is further configured to:

divert the first biasing current to the second biasing current at a rate maintained within a second biasing threshold limit to prevent electrical overstress conditions on components of the laser driver circuit.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.; MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
Reel/Frame 046251/0271 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2017
From: MICROSEMI SOLUTIONS (U.S.), INC.
To: IP GEM GROUP, LLC
Reel/Frame 043212/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2017
From: MICROSEMI SOLUTIONS (U.S.), INC.
To: IP GEM GROUP, LLC
Reel/Frame 043141/0138 →
CHANGE OF NAME Recorded Jun 16, 2017
From: MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
To: MICROSEMI SOLUTIONS (U.S.), INC.
Reel/Frame 042836/0046 →
CHANGE OF NAME Recorded Mar 22, 2016
From: PMC-SIERRA US, INC.
To: MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
Reel/Frame 038213/0291 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI STORAGE SOLUTIONS, INC. (F/K/A PMC-SIERRA, INC.); MICROSEMI STORAGE SOLUTIONS (U.S.), INC. (F/K/A PMC-SIERRA US, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037689/0719 →
RELEASE OF SECURITY INTEREST Recorded Feb 1, 2016
From: BANK OF AMERICA, N.A.
To: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
Reel/Frame 037675/0129 →
SECURITY INTEREST IN PATENTS Recorded Aug 6, 2013
From: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 030947/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2013
From: DELAGE, JEAN-FRANCOIS; FORTIN, GUILLAUME; GALAMBOS, TIBERIU
To: PMC-SIERRA US, INC.
Reel/Frame 030296/0427 →