Granted Patent B2

US 9,142,668 · App. 13/799,142 · Granted Sep 22, 2015

Abstract

Claims (34)

1. A method of forming a transistor device, comprising;

providing a drift layer having a first conductivity type;

forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type;

forming a body layer having the second conductivity type on the drift layer including the first region;

forming a source layer on the body layer, the source layer having the first conductivity type; and

forming a trench in the source layer and the body layer above the first region,

wherein a width of the first region is less than the width of the trench; and

wherein forming the first region comprises selectively implanting dopants into the drift layer.

2. The method of claim 1 , wherein selectively implanting dopant atoms into the drift layer comprises selectively implanting dopants at an implant energy of less than about 1000 keV.

3. The method of claim 1 , wherein the body layer and the source layer are formed by epitaxial regrowth.

4. The method of claim 1 , wherein the body layer is formed by epitaxial regrowth and the source layer is formed by ion implantation.

5. The method of claim 1 , further comprising doping an upper portion of the drift layer adjacent the trench with first conductivity type dopants more heavily than a lower portion of the drift layer to form a current spreading region in the upper portion of the drift layer.

6. The method of claim 1 , further comprising:

forming a second region in the drift layer, the second region having the second conductivity type and being spaced apart from the first region; and

forming a body contact region having the second conductivity type, the body contact region extending through the source layer and the body layer and into the second region.

7. The method of claim 6 , wherein a distance between the second region and a bottom corner of the trench is about 0.1 microns to about 2 microns.

8. The method of claim 1 , wherein the trench extends into the first region.

9. The method of claim 1 , further comprising:

forming a gate insulator on the inner sidewall of the trench; and

forming a gate contact on the gate insulator.

10. The method of claim 1 , further comprising:

forming a gate insulator on an inner sidewall and a bottom surface of the trench, wherein the gate insulator extends on a top surface of the source layer, opposite the body layer.

11. The method of claim 1 , further comprising:

forming a gate insulator on an inner sidewall and a bottom surface of the trench,

forming a gate conductor on the gate insulator, wherein the wherein the first region overlaps the gate conductor but does not overlap the gate insulator on the inner sidewall of the trench.

12. A method of forming a transistor device, comprising:

providing a drift layer having a first conductivity tape;

forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type;

forming a body layer having the second conductivity type on the drift layer including the first region;

forming a source layer on the body layer, the source layer having the first conductivity type;

forming a trench in the source layer and the body layer above the first region,

wherein a width of the first region is less than the width of the trench; and

doping an upper portion of the drift layer adjacent the trench with first conductivity type dopants more heavily than a lower portion of the drift layer to form a current spreading region in the upper portion of the drift layer;

wherein the first region is shallower than the current spreading region.

Assignments (7)