Semiconductor device and method for manufacturing the same
View Patent ↗A method for manufacturing a semiconductor device including at least one of the following steps: (1) Forming a lower electrode pattern on/over a substrate. (2) Forming a first interlayer insulating layer on the lower electrode pattern. (3) Forming an upper electrode pattern on the first interlayer insulating layer. (4) Forming a passivation layer on a side of the upper electrode pattern. (5) Forming a second interlayer insulating layer on the upper electrode pattern. (6) Etching the second interlayer insulating layer to form a cavity which exposes the passivation layer. (7) Forming a contact ball in the cavity.
1. A method comprising:
forming a lower electrode pattern over a substrate;
forming a first interlayer insulating layer over the lower electrode pattern;
forming an upper electrode pattern over the first interlayer insulating layer;
forming a passivation layer over a side of the upper electrode pattern;
forming a second interlayer insulating layer over the upper electrode pattern;
etching the second interlayer insulating layer to form a cavity, wherein the cavity exposes the passivation layer; and
forming a contact ball in the cavity,
wherein said forming the passivation layer comprises oxidizing at least a portion of the side of the upper electrode pattern to form the passivation layer.
2. A method comprising:
forming a lower electrode pattern over a substrate;
forming a first interlayer insulating layer over the lower electrode pattern;
forming an upper electrode pattern over the first interlayer insulating layer;
forming a passivation layer over a side of the upper electrode pattern;
forming a second interlayer insulating layer over the upper electrode pattern;
etching the second interlayer insulating layer to form a cavity, wherein the cavity exposes the passivation layer; and
forming a contact ball in the cavity, wherein:
said forming an upper electrode pattern comprises forming a plurality of upper electrodes spaced from one another over the first interlayer insulating layer,
said forming an upper electrode pattern comprises forming the plurality of upper electrodes each having a stack of a lower barrier layer, a main electrode layer, and an upper electrode layer, and
the cavity exposes the lower barrier layer and the upper barrier layer adjacent to the passivation layer.
3. The method of claim 2 , wherein said forming a passivation layer comprises oxidizing the side of the main electrode layer to form the passivation layer.
4. The method of claim 2 , wherein said forming a passivation layer includes the step of oxidizing a portion of the main electrode layer positioned between an edge of the lower barrier layer and an edge of the upper barrier layer to form the passivation layer.
5. The method of claim 2 , wherein the cavity exposes a side of the lower barrier layer, a portion of an underside of the lower barrier layer adjacent to the side of the lower barrier layer exposed thus, a side of the upper barrier layer, and a portion of an upper side of the upper barrier layer adjacent to the side of the upper barrier layer exposed thus.
6. A method, comprising:
forming a lower electrode pattern over a substrate;
forming a first interlayer insulating layer over the lower electrode pattern;
forming an upper electrode pattern over the first interlayer insulating layer;
forming a passivation layer over a side of the upper electrode pattern;
forming a second interlayer insulating layer over the upper electrode pattern;
etching the second interlayer insulating layer to form a cavity, wherein the cavity exposes the passivation layer;
forming a contact ball in the cavity; and
forming a stop film between the lower electrode pattern and the first interlayer insulating layer.
7. The method of claim 6 , comprising forming a contact in contact with the lower electrode pattern passed through the first interlayer insulating layer and the stop film, wherein said the second upper electrode pattern is formed to be in contact with the contact.