IP Library Granted Patent US 9,673,692
Granted Patent B2
US 9,673,692 · App. 13/835,911 · Granted Jun 6, 2017

Application of normally closed power semiconductor devices

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Quick Facts
Patent No.
US 9,673,692
App. No.
13/835,911
Granted
Jun 6, 2017
Kind
B2
Abstract

A power source delivers power from a main power source using switching by a normally on transistor. A driver switches on and off the normally on transistor under a control signal by a controller during regular operation. A housekeeping power supply delivers auxiliary power to the driver. The driver switches off the normally on transistor during irregular operation. Irregular operation occurs at least when the control signal is absent or no auxiliary power is available or during transients such a power up or down. Bridge block pairs thereof can be arranged to form a half bridge power switch, an H bridge switch, a three phase bridge switch, a multi-phase switch, a buck converter, a buck-boost converter, or a boost converter.

Claims (42)

1. A power source, comprising:

a main power source;

a normally on transistor including a first electrode connected to the main power source, a second electrode to provide a power output of the power source, and a control electrode;

a driver including a first input, a second input and a control output connected to the control electrode to switch the normally on transistor;

a controller including a signal output connected to the first input to deliver a control signal to the driver to switch the normally on transistor between an on state and an off state to provide the power output on the signal electrode during regular operation; and

a housekeeping power supply including an auxiliary power output connected to the second input to switch the normally on transistor to the off state and to maintain the normally on transistor in the off state to turn off the power output on the second electrode during irregular operation.

2. The power source according to claim 1 , wherein the irregular operation occurs when the control signal is absent.

3. The power source according to claim 1 , further comprising a capacitor including a third electrode connected to the second electrode.

4. The power source according to claim 1 , wherein the irregular operation occurs during transients of power up and power down of the main power source.

5. The power source according to claim 1 , wherein the housekeeping power supply further includes an input connected to the main power source to power the housekeeping power supply.

6. The power source according to claim 1 , wherein the housekeeping power supply further includes an input connected to a redundant power source to power the housekeeping power supply.

7. The power source according to claim 6 , further comprising a primary inductor coupled in the power source; and wherein the redundant power source comprises a secondary inductor magnetically coupled to the primary inductor to power the housekeeping power supply.

8. The power source according to claim 6 , wherein the redundant power source comprises a battery separate from the main power source.

9. The power source according to claim 6 , wherein the redundant power source comprises a supercapacitor separate from the main power source.

10. The power source according to claim 1 , further comprising a bridge block pair comprising a pair of a first block and a second block;

wherein the first block comprises a primary inductor, a secondary inductor for at least the housekeeping power supply magnetically coupled to the primary inductor and a diode coupled to the secondary inductor to deliver the auxiliary power;

wherein the second block comprises at least the normally on transistor and a second normally on transistor operatively coupled with each other; and

wherein the second block comprises at least the driver and a second driver, each of said drivers coupled to the gate of a corresponding normally on transistor, the housekeeping power supply, and the controller.

11. The power source according to claim 10 , wherein the bridge block pair is arranged to form a half bridge power switch.

12. The power source according to claim 10 , wherein two bridge block pairs are arranged to form an H bridge switch.

13. The power source according to claim 10 , wherein three bridge block pairs are arranged to form a multi-phase bridge switch comprising three or more bridge block pairs.

14. The power source according to claim 10 , wherein the bridge block pair is arranged to form a power supply chosen from the group consisting of a buck converter, buck-boost converter, and boost converter.

15. The power source according to claim 6 , wherein the redundant power source comprises:

a primary inductor in series with the normally on transistor;

wherein the redundant power source further comprises a secondary inductor magnetically coupled to the primary inductor to redundantly serve as a first power source to power the driver during a transition condition such as a startup of the system; and

wherein the redundant power source further comprises at least one rectifier diode coupled to the secondary inductor to redundantly provide a DC power source to the driver during the transients, wherein the transients occur during power up and power down of the main power source.

16. The power source according to claim 15 ,

wherein the primary inductor is located as an inductor in series between the main power source and the normally on transistor;

wherein the first power supply further comprises a diode in series between the normally on transistor and the output; and

wherein the controller controls the switch off of the normally on transistor in at least a boost switching operation reliant on the primary inductor as the inductor and the diode during operation as a boost power supply.

17. The power source according to claim 15 ,

wherein the primary inductor is located as an inductor in series between the main power source and the normally on transistor;

wherein the first power source further comprises a diode in parallel with the output; and

wherein the controller controls the switching of the normally on transistor in at least a buck switching operation reliant on the primary inductor as an inductor and the diode during operation as a buck power supply.

18. The power source according to claim 1 , further comprising a main switch operatively coupled in series with the main power source and operatively coupled to the controller for disconnecting the main power source upon a fault condition.

19. The power source according to claim 1 , wherein the normally on transistor is chosen from the group consisting of SiC, GaN and diamond semiconductors.

20. A method, comprising:

connecting a first electrode of a transistor of a power supply to a main power source of the power supply, wherein the transistor is a normally-on transistor;

connecting a second electrode of the transistor to an output of the power supply to provide a power output;

connecting a control output of a driver of the power supply to a control electrode of the transistor, the control output to switch the transistor;

connecting a signal output of a controller of the power supply to a first input of the driver, the signal output to direct the driver to switch the transistor between an on state and an off state to provide the power output on the second electrode during regular operation; and

connecting an auxiliary power output of a housekeeping power supply to a second input of the driver, the auxiliary power output to switch the normally on transistor to the off state and to maintain the normally on transistor in the off state to turn off the power output on the signal electrode during irregular operation.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0704 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0744 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0725 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 030445/0737 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030445/0709 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030445/0581 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2013
From: DROBNIK, JOSEF C
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 030014/0751 →