Solid electrolyte based memory devices and methods having adaptable read threshold levels
A method can include determining at least one use characteristic for the memory cells comprising a solid electrolyte, the use characteristic corresponding to a number of times the memory cells have been programmed to at least one impedance level; and adjusting a read threshold level for the memory cells based on at least the use characteristic, the read threshold level determining data values stored in the memory cells in a read operation.
1. A method, comprising:
programming memory cells to one of least two different impedance levels to establish data values stored therein;
after the memory cells have been programmed to their impedance levels, determining at least one use characteristic for the memory cells comprising a solid electrolyte, the use characteristic varying according to a number of times the memory cells have been programmed to at least one of the impedance levels; and
adjusting a read threshold level for the memory cells based on at least the use characteristic exceeding a predetermined limit, the read threshold level determining data values stored in the memory cells in a read operation, the read threshold level distinguishing between the at least two different impedance states.
2. The method of claim 1 , further including:
the memory cells comprise conductive bridging random access memory (CBRAM) type cells programmable between at least two different resistance states; and
programming the memory cells includes erasing the memory cells to a high resistance state and programming the memory cells to a low resistance state.
3. The method of claim 1 , wherein:
the memory cells comprise a solid electrolyte selected from the group of: a metal oxide, a non-metal oxide, a chalcogenide, a transition metal oxide, and a rare-earth oxide.
4. The method of claim 1 , wherein:
determining at least one use characteristic includes determining a range of impedances of all the memory cells of a predetermined group of memory cells.
5. The method of claim 4 , wherein:
determining the range of impedances of all the memory cells of the predetermined group includes
applying program conditions to the memory cells,
repeatedly verifying whether any memory cells were not programmed; and
at least one use characteristic is based on the number of times program conditions were applied to the predetermined group of memory cells.
6. The method of claim 1 , further including:
incrementing a cycle count for the memory cells in response to the memory cells being programmed; and
determining the use characteristic includes reading the cycle count for the memory cells.
7. The method of claim 1 , wherein:
the read threshold level is selected from the group of: a read reference current compared to a memory cell current in a read operation; a read threshold voltage compared to a voltage generated with a memory cell in a read operation; and a read resistance compared to a memory cell resistance in a read operation.
8. The method of claim 1 , further including:
re-conditioning the memory cells if at least one use characteristic is outside of at least one limit, the re-conditioning including the application of electrical conditions different than those that program the memory cells to particular impedance levels prior to the re-conditioning.
9. The method of claim 8 , wherein:
the re-conditioning changes the memory cells to have a tighter impedance distribution than that prior to the re-conditioning.
10. The method of claim 1 , further including:
programming one of a plurality of sections in a memory device;
determining at least one use characteristic for the memory cells includes determining the use characteristic for the programmed section; and
adjusting a read threshold level includes adjusting a read threshold level for the section; wherein
each section has its own use characteristic and read threshold level.
11. A memory device, comprising:
a plurality of solid electrolyte memory cells programmable between at least two impedance levels;
a controller circuit configured to generate and store at least one use characteristic that varies according to a number of times the memory cells have been programmed; and
a read circuit configured to generate read data by comparing sense values generated from the memory cells to at least one threshold value, the at least one threshold value varying in response to at least one use characteristic exceeding a predetermined limit.
12. The memory device of claim 11 , wherein:
the memory cells comprise conductive bridging random access memory (CBRAM) type cells programmable between at least two different resistance states.
13. The method of claim 11 , wherein:
the memory cells comprise a solid electrolyte selected from the group of: a metal oxide, a non-metal oxide, a chalcogenide, a transition metal oxide, and a rare-earth oxide.
14. The memory device of claim 11 , wherein:
the memory cells are arranged into a plurality of sections; and
the read circuit compares sense values of memory cells from one section to a threshold value particular to that section.
15. The memory device of claim 14 , wherein:
the sections comprise sectors, the memory cells of each sector being programmable to one value in a single operation.
16. A memory device, comprising:
a plurality of solid electrolyte memory cells programmable between at least two impedance levels;
a programming circuit that applies programming electrical conditions to the memory elements to store data values therein;
a controller circuit configured to generate and store at least one use characteristic that changes according to a number of times the memory cells have been programmed to at least one impedance state; and
a re-conditioning circuit that, when activated, applies re-conditioning electrical conditions to the memory cells that are different from programming electrical conditions; wherein
the controller circuit is further configured to activate the re-conditioning circuit in response to the use characteristic being outside of at least one limit.
17. The method of claim 16 , wherein:
the re-conditioning electrical conditions change the memory cells to have a tighter impedance distribution than that prior to the application of the re-conditioning electrical conditions.
18. The memory device of claim 16 , further including:
a read circuit configured to generate read data by comparing sense values generated from the memory cells to at least one threshold value, the at least one threshold value varying in response to at least one use characteristic.
19. The memory device of claim 16 , further including:
a program and verify circuit configured to apply programming electrical conditions to the memory elements to store particular data values therein, and to generate verify results indicating if any of the memory elements stores an incorrect data value; and
the controller circuit includes a verify loop circuit configured to selectively change verify electrical conditions in response to the verify results; wherein
the use characteristic include the verify results.
20. The memory device of claim 16 , wherein:
the controller circuit includes a cycle counter circuit that increments a count value for the memory cells in response to the programming circuit applying at least one programming electrical condition to the memory elements; wherein
the use characteristic includes the count value.