Patent Assignment
Reel/Frame 063118/0352
Assignment of Assignor's Interest
Recorded: 2023-03-20
Pages: 11
Assignor
Assignee
GLOBALFOUNDRIES U.S. INC.
400 STONEBREAK ROAD EXTENSION, MALTA, NEW YORK, 12020
Covered Properties
(95)
Method for Operating an Integrated Circuit Having a Resistivity Changing Memory Cell
A Memory Device Including Electrical Circuit Configured to Provide Reversible Bias Across the Pmc Memory Cell to Perform Erase and Write Functions
Memory Having Cbram Memory Cells and Method
Resistive Memory Arrangement
Integrated Semiconductor Memory with an Arrangement of Nonvolatile Memory Cells, and Method
Memory Cells with an Anode Comprising Intercalating Material and Metal Species Dispersed Therein
Resistive Memory Arrangement
Nor and Nand Memory Arrangement of Resistive Memory Elements
Read, Write, and Erase Circuit for Programmable Memory Devices
A Memory Device Including Electrical Circuit Configured to Provide Reversible Bias Across the Pmc Memory Cell to Perform Erase and Write Functions
Integrated Circuits Having Programmable Metallization Cells (Pmcs) and Operating Methods Therefor
Patent:
8,107,273 →
Application:
12/508,212 →
Variable Impedance Memory Device Having Simultaneous Program and Erase, and Corresponding Methods and Circuits
Patent:
8,274,842 →
Application:
12/566,790 →
Reconfigurable Memory Arrays Having Programmable Impedance Elements and Corresponding Methods
Patent:
8,331,128 →
Application:
12/629,531 →
Conducting Bridge Random Access Memory (CBRAM) Device Structures
Patent:
8,426,839 →
Application:
12/767,552 →
Programmable Impedance Element Circuits and Methods
Patent:
8,294,488 →
Application:
12/767,732 →
Pmc-Based Non-Volatile Cam
Patent:
8,320,148 →
Application:
12/802,506 →
Method for Producing Memory Having a Solid Electrolyte Material Region
Methods and Circuits for Temperature Varying Write Operations of Programmable Impedance Elements
Patent:
8,437,171 →
Application:
12/980,752 →
Circuits and Methods Having Programmable Impedance Elements
Patent:
8,947,913 →
Application:
13/114,192 →
Circuits Having Programmable Impedance Elements
Patent:
8,687,403 →
Application:
13/157,713 →
Programmable Impedance Elements and Devices That Include Such Elements
Patent:
9,401,472 →
Application:
13/242,391 →
Variable Impedance Memory Device Structure and Method of Manufacture Including Programmable Impedance Memory Cells and Methods of Forming the Same
Patent:
8,829,482 →
Application:
13/242,854 →
Memory Devices, Circuits and Methods Having Data Values Based on Dynamic Change in Material Property
Patent:
9,177,639 →
Application:
13/315,652 →
Resistive Memory Devices, Circuits and Methods Having Read Current Limiting
Patent:
9,165,648 →
Application:
13/336,642 →
Methods of Programming and Erasing Programmable Metallization Cells (Pmcs)
Patent:
8,369,132 →
Application:
13/337,004 →
Memory Cell Device and Method of Manufacture
Memory Devices and Methods for Read and Write Operation to Memory Elements Having Dynamic Change in Property
Patent:
9,099,175 →
Application:
13/408,367 →
Circuits and Methods for Placing Programmable Impedance Memory Elements in High Impedance States
Patent:
8,730,752 →
Application:
13/437,906 →
Memory Devices, Architectures and Methods for Memory Elements Having Dynamic Change in Property
Patent:
8,854,873 →
Application:
13/464,926 →
Method of Operating a Resistive Memory Device with a Ramp-Up/Ramp-Down Program/Erase Pulse
Contact Structure and Method for Variable Impedance Memory Element
Resistive Switching Devices Having A Buffer Layer and Methods of Formation Thereof
Patent:
8,866,122 →
Application:
13/517,653 →
METHODS OF PROGRAMMING AND ERASING PROGRAMMABLE METALLIZATION CELLS (PMCs)
Patent:
8,625,331 →
Application:
13/545,792 →
Programmable Memory Elements, Devices and Methods Having Physically Localized Structure
Patent:
8,895,953 →
Application:
13/545,958 →
Programmable Window of Operation for Cbram
Patent:
9,047,948 →
Application:
13/548,429 →
Cbram/Reram with Improved Program and Erase Algorithms
Patent:
8,659,954 →
Application:
13/548,470 →
Resistive Switching Devices Having Alloyed Electrodes And Methods of Formation Thereof
Variable Impedance Memory Device Biasing Circuits and Methods
Patent:
8,498,164 →
Application:
13/594,756 →
Memory Cells, Devices and Method with Dynamic Storage Elements and Programmable Impedance Shadow Elements
Patent:
8,995,173 →
Application:
13/603,373 →
Resistive Devices and Methods of Operation Thereof
Resistive Switching Memory
Safeguarding Data Through an Smt Process
Patent:
9,007,808 →
Application:
13/628,385 →
Pmc-Based Non-Volatile Cam
Patent:
8,659,926 →
Application:
13/647,534 →
Programmable Impedance Element Circuits and Methods
Patent:
9,159,414 →
Application:
13/657,568 →
Integrated Circuit Devices and Systems Having Programmable Impedance Elements with Different Response Types
Patent:
8,675,396 →
Application:
13/710,329 →
Verify Pulse Delay to Improve Resistance Window
Patent:
9,019,745 →
Application:
13/743,939 →
Two Terminal Resistive Access Devices and Methods of Formation Thereof
Patent:
9,373,786 →
Application:
13/748,470 →
Reverse Program and Erase Cycling Algorithms
Patent:
8,995,167 →
Application:
13/757,275 →
Pre-Conditioning Circuits and Methods for Programmable Impedance Elements in Memory Devices
Patent:
9,025,396 →
Application:
13/763,461 →
Resistive Switching Devices and Methods of Formation Thereof
Sensing Data in Resistive Switching Memory Devices
Resistive Switching Devices Having a Switching Layer and an Intermediate Electrode Layer and Methods of Formation Thereof
Storage Elements, Structures and Methods Having Edgeless Features for Programmable Layer(S)
Patent:
9,412,945 →
Application:
13/830,315 →
System Architecture with Multiple Memory Types, Including Programmable Impedance Memory Elements
Patent:
9,147,464 →
Application:
13/846,539 →
Solid Electrolyte Memory Elements with Electrode Interface for Improved Performance
Solid Electrolyte Based Memory Devices and Methods Having Adaptable Read Threshold Levels
Triggered Cell Annihilation for Resistive Switching Memory Devices
Patent:
9,053,789 →
Application:
13/859,853 →
Current Source Circuits and Methods for Mass Write and Testing of Programmable Impedance Elements
Patent:
8,947,907 →
Application:
13/862,390 →
Common Plate Switching Reduction in Resistive Switching Memory Devices
Patent:
9,336,868 →
Application:
13/909,983 →
Memory Elements and Methods with Improved Data Retention and/or Endurance
Application of Relaxation Voltage Pulses to Programmble Impedance Elements During Read Operations
Patent:
9,007,814 →
Application:
14/197,541 →
Nonvolatile Memory Elements Having Conductive Structures with Semimetals and/or Semiconductors
Circuits Having Programmable Impedance Elements and Vertical Access Devices
Patent:
9,343,667 →
Application:
14/231,729 →
Resistive Switching Memory Device with Diode Select
Patent:
9,099,176 →
Application:
14/256,123 →
Circuits and Methods for Placing Programmable Impedance Memory Elements in High Impedance States
Patent:
9,368,198 →
Application:
14/281,830 →
Capacitor Arrangements Using a Resistive Switching Memory Cell Structure
Patent:
9,368,206 →
Application:
14/325,119 →
Programmable Impedance Memory Elements with Laterally Extending Cell Structure
Patent:
8,952,351 →
Application:
14/447,322 →
Memory Cells with Vertically Integrated Tunnel Access Device and Programmable Impedance Element
Patent:
9,391,270 →
Application:
14/530,460 →
Resistive Switching Memory
Read Operations and Circuits for Memory Devices Having Programmable Elements, Including Programmable Resistance Elements
Patent:
9,570,166 →
Application:
14/572,646 →
Resistive Devices and Methods of Operation Thereof
Verify Pulse Delay to Improve Resistance Window
Patent:
9,208,876 →
Application:
14/663,719 →
Prototyping Integrated Circuit Devices with Programmable Impedance Elements
Patent:
9,373,398 →
Application:
14/686,403 →
Memory Devices and Methods for Storing Single Data Value in Multiple Programmable Resistance Elements
Patent:
9,721,658 →
Application:
14/791,416 →
Resistive Switching Memory Having a Resistor, Diode, and Switch Memory Cell
Patent:
9,530,495 →
Application:
14/819,014 →
Resistive Memory Device with Ramp-Up/Ramp-Down Program/Erase Pulse
System Architectures with Data Transfer Paths Between Different Memory Types
Patent:
9,455,036 →
Application:
14/868,363 →
Write Parameter Switching in a Memory Device
Patent:
10,191,666 →
Application:
14/875,464 →
Methods for Setting a Resistance of Programmable Resistance Memory Cells and Devices Including the Same
Patent:
9,613,693 →
Application:
14/927,352 →
Resistive Switching Devices Having a Switching Layer and an Intermediate Electrode Layer and Methods of Formation Thereof
Dual Program State Cycling Algorithms for Resistive Switching Memory Device
Patent:
9,524,777 →
Application:
15/071,567 →
Programmable Impedance Memory Device and Related Methods
Patent:
10,181,496 →
Application:
15/143,310 →
Methods of Making Memory Devices with Programmable Impedance Elements and Vertically Formed Access Devices
Patent:
9,755,142 →
Application:
15/155,301 →
Methods of Fabricating Storage Elements and Structures Having Edgeless Features for Programmable Layer(S)
Patent:
9,595,671 →
Application:
15/214,224 →
Memory Elements Having Conductive Cap Layers and Methods Therefor
Nonvolatile Memory Elements Having Conductive Structures with Semimetals and/or Semiconductors
Application:
15/650,719 →
Publication:
US 2018/0033960
Methods of Operating Integrated Circuit Devices Having Volatile and Nonvolatile Memory Portions
Patent:
10,446,747 →
Application:
15/693,360 →
Memory Device Having Programmable Impedance Elements with a Common Conductor Formed Below Bit Lines
Reference Circuits and Methods for Resistive Memories
Patent:
10,984,861 →
Application:
16/032,012 →
Static Random Access Memories with Programmable Impedance Elements and Methods and Devices Including the Same
Memory Device with Adaptive Noise and Voltage Suppression During Read-While-Write Operations
Pseudo Physically Unclonable Functions (Pufs) Using One or More Addressable Arrays of Elements Having Random/Pseudo-Random Values
Patent:
11,537,754 →
Application:
16/571,051 →
Low Power Standby Mode for Memory Devices
Memory-Based Vector-Matrix Multiplication
Application:
17/601,778 →
Publication:
US 2022/0156345
Cbram Bottom Electrode Structures
Application:
17/879,904 →
Publication:
US 2023/0086109
Related Assignments
(13)
Other recorded transfers of the patents in this record — the chain of ownership.
Contribution Agreement (Relevant Parts; English Translation)
Nov 20, 2009
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023547/0566 →
Assignment of Assignor's Interest
Dec 23, 2009
From: HOLLMER, SHANE CHARLES; GILBERT, NAD EDWARD
To: ADESTO TECHNOLOGIES CORPORATION
Reel/Frame 023697/0646 →
Assignment of Assignor's Interest
Dec 23, 2009
From: LIAW, CORVIN; ROEHR, THOMAS; KUND, MICHAEL
To: INFINEON TECHNOLOGIES AG
Reel/Frame 023691/0543 →
Security Agreement
Oct 8, 2012
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OPUS BANK
Reel/Frame 029090/0922 →
Assignment of Assignor's Interest
Dec 3, 2012
From: GILBERT, NAD EDWARD
To: ADESTO TECHNOLOGIES CORPORATION
Reel/Frame 029396/0722 →
Security Agreement
Oct 7, 2013
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: BRIDGE BANK, NATIONAL ASSOCIATION
Reel/Frame 031371/0581 →
Release of Security Interest
Oct 15, 2013
From: OPUS BANK
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 031414/0232 →
Security Interest
May 22, 2015
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OPUS BANK
Reel/Frame 035754/0580 →
Release of Security Interest
Oct 3, 2017
From: WESTERN ALLIANCE BANK
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 044219/0610 →
Security Interest
May 8, 2018
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
Reel/Frame 046105/0731 →
Release of Security Interest
May 9, 2019
From: OPUS BANK
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 049125/0970 →
Release of Security Interest
Sep 24, 2019
From: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 050480/0836 →
Assignment of Assignor's Interest
Mar 12, 2023
From: PHARMALIPOCORE INC
To: SUNG, ROSEMARY
Reel/Frame 062954/0374 →