Memory cell device and method of manufacture
View Patent ↗According to one embodiment of the present invention, a solid state electrolyte memory cell includes a cathode, an anode and a solid state electrolyte. The anode includes an intercalating material and first metal species dispersed in the intercalating material.
1. A method of manufacturing an integrated circuit, the method comprising:
depositing a cathode material over a substrate;
depositing chalcogenide material over the cathode material;
depositing a layer of a second metal species onto the chalcogenide material;
illuminating the layer of the second metal species with light, thereby obtaining a solution of the second metal species in the chalcogenide material;
depositing an intercalating material onto the chalcogenide material with the second metal species dissolved therein; and
treating the intercalating material with a first metal species to obtain an anode comprising an intercalating material and the first metal species dispersed therein wherein a surface of the anode formed is of a homogeneous material.
2. The method of claim 1 , wherein illuminating the layer of the second metal species with light comprises illuminating the layer of the second metal species with light having a wavelength of less than 500 nm.
3. The method of claim 1 , wherein the first metal species comprises silver atoms.
4. The method of claim 1 , wherein the second metal species comprises silver ions.
5. The method of claim 1 , wherein the intercalating material comprises a material selected from the group consisting of carbon-containing material, silicon, inorganic oxide(s) and organic polymers.
6. The method of claim 4 , wherein the intercalating material comprises a carbon-containing material.
7. The method of claim 4 , wherein the intercalating material comprises a material selected from the group consisting of MoS 2 , MnO 2 , CoO x , CoMnO x , TiS 2 , NbSe 3 , VO x , V 2 O 5 and CuCl 2 .
8. The method according to claim 4 , wherein the intercalating material comprises a material selected from the group consisting of polyacetylene, polypyrrole, polyaniline and polythiophene.
9. The method according to claim 1 , wherein depositing the chalcogenide material comprises reactive sputtering of S, Se or Te and wherein the second metal species comprises a metal selected from the group consisting of germanium, bismuth, nickel, and zinc.
10. The method according to claim 1 , wherein depositing the chalcogenide material comprises reactive sputtering of S, Se and Te and wherein the second metal species comprises a metal selected from the group consisting of germanium, bismuth, nickel, and zinc.
11. A method of manufacturing an integrated circuit, the method comprising:
depositing a cathode material over a substrate;
depositing chalcogenide material over the cathode material;
doping the chalcogenide material with a second metal species;
depositing an intercalating material over the chalcogenide material doped with the second metal species; and
treating the intercalating material with a first metal species to obtain an anode comprising an intercalated material and the first metal species dispersed therein, wherein a homogeneous surface of the anode is formed.
12. The method of claim 11 , wherein the first metal species comprises silver atoms.
13. The method of claim 11 , wherein the second metal species comprises silver ions.
14. The method of claim 11 , wherein the intercalating material comprises a material selected from the group consisting of carbon-containing material, silicon, inorganic oxide(s) and organic polymers.
15. The method of claim 14 , wherein the intercalating material comprises a carbon-containing material.
16. The method of claim 14 , wherein the intercalating material comprises a material selected from the group consisting of MoS 2 , MnO 2 , CoO x , CoMnO x , TiS 2 , NbSe 3 , VO X , V 2 O 5 and CuCl 2 .
17. The method according to claim 14 , wherein the intercalating material comprises a material selected from the group consisting of polyacetylene, polypyrrole, polyaniline and polythiophene.
18. The method according to claim 11 , wherein the chalcogenide material comprises reactive sputtering of S, Se or Te and wherein the second metal species comprises a metal selected from the group consisting of germanium, bismuth, nickel, polonium and zinc.
19. The method according to claim 11 , wherein depositing the chalcogenide material comprises reactive sputtering of S, Se and Te and wherein the second metal species comprises a metal selected from the group consisting of germanium, bismuth, nickel, polonium and zinc.
20. An integrated circuit device, comprising:
a cathode;
an anode, the anode comprising an intercalating material and first metal species dispersed in the intercalating material;
a solid state electrolyte arranged between the cathode and the anode; and
means for selectively establishing a conductive path through the solid state electrolyte in response to an electric field applied between the cathode and anode,
wherein a homogeneous surface of the anode is formed.