Method of forming stacked die package using redistributed chip packaging
View Patent ↗A method of making a semiconductor device includes providing a first semiconductor die and a conductive frame member having at least one conductive via. A first encapsulation layer is formed. A first redistribution layer is formed opposite the first encapsulation layer. A second redistribution layer is formed opposite the first redistribution layer. A second semiconductor die is mounted and electrically connected with receptor pads in the second redistribution layer. A third semiconductor die is mounted to the second semiconductor die and electrically connected with bond wires to a conductor in the second redistribution layer. A second encapsulation layer embeds the second and third semiconductor dies, the wires, and the conductor in the second redistribution layer.
1. A method of making a semiconductor device, the method comprising:
providing a first semiconductor die having opposing first and second faces and at least one conductive frame member proximate the first semiconductor die comprising a via insulating material and opposing first and second faces, the first semiconductor die having at least one contact at the second face thereof, the at least one conductive frame member having at least one conductive via exposed at the second face thereof and extending into the via insulating material toward the first face thereof;
forming a first encapsulation layer to embed the first faces of the first semiconductor die and the at least one conductive frame member;
forming a first redistribution layer on the second faces of the first semiconductor die and the at least one conductive frame member, the first redistribution layer including a first non-conductive redistribution material surrounding an array of first redistribution conductors respectively electrically connected to the at least one conductive via and the at least one contact;
thinning the at least one conductive frame member at the first face thereof to expose the at least one conductive via at a side opposite to the first redistribution layer;
forming a second redistribution layer on the first faces of the at least one conductive frame member and the first semiconductor die, the second redistribution layer including a second non-conductive redistribution material surrounding at least one second redistribution conductor, electrically connected to the at least one conductive via, and a plurality of grid array receptor pads;
mounting a second semiconductor die having opposing first and second faces to the second redistribution layer such that a ball grid array (BGA) on the second face of the second semiconductor die is electrically connected to the plurality of grid array receptor pads in the second redistribution layer;
mounting a third semiconductor die having first and second faces to the first face of the second semiconductor die;
wire bonding the third semiconductor die to the at least one second redistribution conductor; and
forming a second encapsulation layer on the second redistribution layer to embed the second semiconductor die, the third semiconductor die, the wires, and the at least one second redistribution conductor.
2. The method of claim 1 , wherein the second faces of the first semiconductor die and the at least one conductive frame member are mounted to a carrier prior to formation of the first encapsulation layer.
3. The method of claim 2 , further comprising removing the carrier prior to the formation of the first redistribution layer.
4. The method of claim 1 , further comprising mounting the first redistribution layer to a carrier.
5. The method of claim 4 , further comprising removing the carrier from the first distribution layer following the formation of the second encapsulation layer.
6. The method of claim 1 , wherein the step of thinning the first face of the at least one conductive frame member includes grinding the first face of the at least one conductive frame member.
7. The method of claim 6 , further comprising grinding the first encapsulation layer and the first face of the first semiconductor die.
8. The method of claim 1 , further comprising attaching solder balls to the first redistribution conductors after the step of forming the second encapsulation layer.
9. A method of making a semiconductor device, the method comprising:
providing a first semiconductor die having opposing first and second faces and at least one first conductive frame member proximate the first semiconductor die comprising a first via insulating material, the first semiconductor die having at least one contact at the second face thereof, the at least one conductive frame member having at least one first conductive via exposed at the second face thereof and extending into the first via insulating material toward the first face thereof;
forming a first encapsulation layer to embed the first faces of the first semiconductor die and the at least one first conductive frame member;
forming a first redistribution layer on the second faces of the first semiconductor die and the at least one first conductive frame member, the first redistribution layer including a first non-conductive redistribution material surrounding an array of first redistribution conductors respectively electrically connected to the at least one conductive via and the at least one contact;
thinning the at least one first conductive frame at the first face thereof to expose the at least one first conductive via at a side opposite to the first redistribution layer;
forming a second redistribution layer on the first faces of the at least one first conductive frame member and the first semiconductor die, the second redistribution layer including a second non-conductive redistribution material surrounding an array of second redistribution conductors respectively electrically connected to the at least one first conductive via and to the first semiconductor die;
mounting a second semiconductor die having first and second faces to the second redistribution layer such that electrical connection is made between solder balls disposed on the second face of the second semiconductor layer and the second redistribution conductors that are electrically connected to the first semiconductor die;
mounting at least one second conductive frame member on the second redistribution layer, the at least one second conductive frame member having first and second faces, a second via insulating material, and at least one second conductive via exposed at the second face thereof and extending into the second via insulating material toward the first face thereof, the at least one second conductive via being placed in electrical connection with the second redistribution conductor electrically connected to the at least one first conductive via;
forming a second encapsulation layer on the second redistribution layer to embed the second semiconductor die and the at least one second conductive frame member.
10. The method of claim 9 , further comprising removing a portion of the second encapsulation layer to expose the first faces of the second semiconductor die and the at least one second conductive frame member.
11. The method of claim 10 , further comprising thinning the at least one second conductive frame member at the first face thereof to expose the at least one second conductive via at a side opposite to the second redistribution layer.
12. The method of claim 11 , further comprising forming a third redistribution layer on the first faces of the at least one second conductive frame member and the second semiconductor die, the third redistribution layer including a third non-conductive redistribution material surrounding an array of third redistribution conductors respectively electrically connected to the at least one second conductive via and to the second semiconductor die.
13. The method of claim 12 , further comprising mounting a third semiconductor die having first and second faces to the third redistribution layer such that electrical connection is made between solder balls disposed on the second face of the third semiconductor layer and the third redistribution conductors that are electrically connected to the second semiconductor die.
14. The method of claim 13 , further comprising forming a third encapsulation layer on the third redistribution layer to embed the third semiconductor die.
15. The method of claim 14 , further comprising forming solder balls connected to the first redistribution conductors after the formation of the third encapsulation layer.
16. The method of claim 9 , further comprising mounting the first redistribution layer to a carrier.
17. The method of claim 16 , further comprising removing the carrier following formation of the second encapsulation layer.
18. The method of claim 9 , wherein the second faces of the semiconductor die and the at least one first conductive frame member are mounted on a carrier prior to the formation of the first encapsulation layer,
the method further comprising removing the carrier prior to the formation of the first redistribution layer.
19. The method of claim 9 , further comprising screen printing with solder paste openings in the second redistribution layer corresponding to the second redistribution conductors connected to the at least one first conductive via.
20. The method of claim 9 , further comprising forming solder balls connected to the first redistribution conductors after the step of forming the second encapsulation layer.