Bidirectional silicon carbide transient voltage supression devices

1. An electronic device, comprising:

a silicon carbide layer having a first conductivity type and having a first surface and a second surface opposite the first surface;

first and second silicon carbide Zener diodes on the silicon carbide layer, wherein each of the first and second silicon carbide Zener diodes comprises a heavily doped silicon carbide epitaxial layer having a second conductivity type opposite the first conductivity type, wherein each of the heavily doped epitaxial layers forms a Zener junction with the silicon carbide layer and wherein the silicon carbide layer provides a common reference for the first and second silicon carbide Zener diodes,

first and second ohmic contacts, respectively, on the heavily doped silicon carbide epitaxial layers of the first and second silicon carbide Zener diodes opposite the silicon carbide layer; and

a third ohmic contact on the silicon carbide layer, the third ohmic contact providing a reference contact on the silicon carbide layer for both the first and second silicon carbide Zener devices.

2. The electronic device of claim 1 , wherein each of the first and second Zener diodes has a Zener breakdown voltage that is less than 20V.

3. An electronic circuit, comprising:

a silicon carbide metal oxide semiconductor field effect transistor (MOSFET) including a gate contact, a drain contact and a source contact; and

a silicon carbide based bidirectional transient voltage suppressor (TVS) coupled between the gate and source contacts of the silicon carbide MOSFET, the silicon carbide based TVS including a silicon carbide layer having a first conductivity type and having a first surface and a second surface opposite the first surface, and first and second silicon carbide Zener diodes on the silicon carbide layer, wherein each of the first and second silicon carbide Zener diodes includes a heavily doped silicon carbide region having a second conductivity type opposite the first conductivity type on the silicon carbide layer wherein each of the heavily doped silicon carbide regions forms a Zener junction with the silicon carbide layer and wherein the silicon carbide layer provides a common reference for the first and second silicon carbide Zener diodes, first ohmic contacts on the heavily doped silicon carbide regions and a second ohmic contact on the silicon carbide layer, the second ohmic contact providing a reference contact on the silicon carbide layer for both the first and second silicon carbide Zener devices.

4. The electronic circuit of claim 3 , wherein the first and second silicon carbide diodes comprise mesas on the silicon carbide layer.

5. The electronic circuit of claim 3 , wherein the silicon carbide layer has a thickness less than about 200 μm.

6. The electronic circuit of claim 3 , wherein the silicon carbide layer has a doping concentration of about 5×10 18 cm −3 or more.

7. The electronic circuit of claim 3 , wherein the first heavily doped silicon carbide regions are p-type with a doping concentration of about 5×10 18 cm −3 or more.

8. The bidirectional transient voltage suppression device of claim 3 , wherein at least one of the heavily doped silicon carbide regions has an increased doping concentration near the ohmic contact thereon.

9. The bidirectional transient voltage suppression device of claim 3 , wherein the heavily doped silicon carbide regions comprise heavily doped silicon carbide epitaxial layers on the silicon carbide layer.

10. The bidirectional transient voltage suppression device of claim 3 , wherein the mesas each have a cross sectional area of about 0.25 mm 2 or more.