IP Library › Granted Patent US 8,669,173
Granted Patent B2
US 8,669,173 · App. 13/873,509 · Granted Mar 11, 2014

Methods of fluxless micro-piercing of solder balls, and resulting devices

Inventor: Teck Kheng Lee (Singapore, SG)
Assignee: Micron Technology
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,669,173
App. No.
13/873,509
Granted
Mar 11, 2014
Kind
B2
Abstract

A method of establishing conductive connections is disclosed. The method includes providing an integrated circuit die having a plurality of solder balls each of which has an oxide layer on an outer surface of the solder ball. The method also includes performing a heating process to heat at least the solder balls and applying a force causing each of a plurality of piercing bond structures on a substrate to pierce one of the solder balls and its associated oxide layer to thereby establish a conductive connection between the solder ball and the piercing bond structure.

Claims (31)

1. A method, comprising:

providing an integrated circuit die having a plurality of solder balls, each of which has a layer of oxide on an outer surface of the ball;

performing a heating process to heat at least the solder balls; and

applying a force that causes each of a plurality of piercing bond structures on a substrate to pierce one of the solder balls and its associated oxide layer to thereby establish a conductive connection between the solder ball and the piercing bond structure.

2. The method of claim 1 , wherein the steps recited in claim 1 are performed in an ambient, oxygen-containing environment.

3. The method of claim 2 , wherein the steps recited in claim 1 are performed without applying a flux to the plurality of solder balls.

4. The method of claim 1 , wherein performing the heating process comprises heating at least the solder balls to a temperature that is above a melting point of a material of the solder balls.

5. The method of claim 4 , wherein the substrate comprises a printed circuit board.

6. The method of claim 1 , wherein applying the force comprises applying a force ranging from 5-12 Kg for a duration ranging from 0.5-2 seconds.

7. The method of claim 6 , wherein each of the plurality of piercing bond structures has a substantially triangular cross-sectional configuration.

8. The method of claim 1 , further comprising forming a standoff structure between the integrated circuit die and the substrate.

9. The method of claim 1 , further comprising forming an anti-oxidation layer on at least one of the plurality of piercing bond structures.

10. The method of claim 9 , wherein the anti-oxidation layer includes a first layer with a first thickness of about 2.5 μm and a second layer with a second thickness of about 0.3 μm.

11. The method of claim 9 , wherein the anti-oxidation layer includes a first layer of gold and a second layer of nickel.

12. The method of claim 1 , further comprising determining a distance between the integrated circuit and the substrate at least by controlling the heating process.

13. The method of claim 1 , further comprising controlling a distance between the integrated circuit and the substrate at least by adjusting the force.

14. The method of claim 1 , wherein the plurality of piercing bond structures includes a first piercing bond structure and a second piercing bond structure, wherein the first piercing bond structure has a first size different from a second size of the second piercing bond structure.

15. A method, comprising:

forming a plurality of solder balls on a microelectronic component, wherein the individual solder ball includes an oxide layer;

forming a plurality of piercing bond structures on a substrate, wherein the individual piercing bond structure includes an anti-oxidation layer;

heating at least the solder balls; and

moving the piercing bond structures and/or the microelectronic component to pierce the solder balls and the associated oxide layers;

establishing a conductive connection between the microelectronic component and the piercing bond structures.

16. The method of claim 15 , further comprising forming a standoff structure between the microelectronic component and the substrate.

17. The method of claim 15 , wherein the anti-oxidation layer includes a first layer of gold and a second layer of nickel, and wherein the first layer has a first thickness of about 2.5 μm and the second layer has a second thickness of about 0.3 μm.

18. The method of claim 15 , wherein the plurality of piercing bond structures includes a first piercing bond structure and a second piercing bond structure, wherein the first piercing bond structure has a first size different from a second size of the second piercing bond structure.

19. The method of claim 15 , wherein heating at least the solder balls comprises heating the solder balls to a temperature that is above a melting point of a material of the solder balls.

20. A device, comprising:

a microelectronic component having a plurality of solder balls conductively coupled to bond pads on the microelectronic component, each of the solder balls having an oxide layer on its outer surface;

a substrate having a plurality of piercing bond structures, each of the piercing bond structures penetrating the corresponding oxide layer and extending partially into the corresponding solder ball to establish a conductive connection; and

a standoff structure positioned between the microelectronic component and the substrate, wherein the standoff structure spaces the microelectronic device apart from the substrate by a desired distance.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (3)
Division 12827476 · Jun 30, 2010
Division 11958842 · Dec 18, 2007
Related Publication 20130234328A1 · Sep 12, 2013