Method for chip package
Provided is a method for chip packaging, including the steps of: providing a semi-packaged wafer which has a cutting trail and a metal bonding pad of the chip; forming on the metal bonding pad a sub-ball metal electrode, using a selective formation process; forming a protective layer on the wafer in a region not including the sub-ball metal electrode, with the protective layer covering the cutting trail; forming a solder ball on the sub-ball metal electrode; dicing the wafer along the cutting trail. The present invention can prevent metal in the cutting trail from being affected during the production of the sub-ball metal electrode, and protect the lateral sides of a discrete chip after cutting. The process flow thereof is simple, and enhances the efficiency of the packaging as well as its yield.
1. A method for chip package, comprising:
providing a semi-packaged wafer, the semi-packaged wafer having a dicing street and a metal pad;
selectively forming a metal electrode on the metal pad;
forming a protective layer in area outside the metal electrode on the wafer, the protective layer covering the dicing street, where the protective layer is made of a cured thermosetting epoxy resin comprising a solidified filler which has a particle diameter less than one third of the thickness of the thermosetting epoxy resin before the thermosetting epoxy resin is cured, and wherein the solidified filler has a particle diameter greater than one third of the thickness of the thermosetting epoxy resin after the thermosetting epoxy resin is cured, and wherein the solidified filler is silica solid particles;
forming a solder ball on the metal electrode; and
dicing the wafer along the dicing street.
2. The method according to claim 1 , where the selective forming process is a selective plating process.
3. The method according to claim 2 , where the selective plating process comprises: forming a first mask layer on the wafer, exposing an area the metal electrode to be formed; cleaning the wafer using zincate; with the first mask layer protection, plating nickel and gold successively on the wafer using a non-electrolytic plating process; and removing the first mask layer.
4. The method according to claim 3 , where the nickel is plated to a thickness of 3 μm, and the gold is plated to a thickness of 0.05 μm.
5. The method according to claim 3 , where the first mask layer is a photoresist mask.
6. The method according to claim 1 , where the selective forming step is a selective vapor deposition process.
7. The method according to claim 6 , where the selective vapor deposition process comprises: providing a second mask on the wafer, exposing an area the metal electrode to be formed; with the second mask protection, depositing nickel and gold successively on the wafer using a physical vapor deposition process;
and removing the second mask.
8. The method according to claim 7 , where the second mask is a metal mask.
9. The method according to claim 1 , where the protective layer has a thickness ranging from 5 μm to 50 μm.
10. The method according to claim 1 , where the protective layer is made of thermosetting epoxy resin, which is formed using a screen print process.
11. The method according to claim 10 , further comprising a plasma etching to remove the thermosetting epoxy resin covering the top surface of the metal electrode after the protective layer is formed.
12. The method according to claim 10 , where during a screen print process, the wafer's temperature is maintained lower than solidification temperature of the thermosetting epoxy resin.
13. The method according to claim 10 , where the solidification temperature of the thermosetting epoxy resin is lower than 200° C.
14. The method according to claim 1 , where the thermosetting epoxy resin is printed to 15 μm, the solidified filler has a particle diameter no more than 5 μm, and an average thickness of the protective layer formed by solidifying the epoxy resin ranges from 11 μm to 12 μm.
15. The method according to claim 10 , before performing a screen print process, the wafer is baked, or is treated using plasma for activating its surface.
16. The method according to claim 1 , further comprising polishing the wafer surface after the protective layer is formed.
17. The method according to claim 16 , where a mechanical polishing is employed, which comprises: fixing the wafer on an operation table; winding a nonwoven layer with a hardness lower than the wafer around a polishing pad, the nonwovens facing the wafer surface closely; immersing the nonwovens into a polishing solution and polishing the wafer.