Protection device and related fabrication methods
View Patent ↗Protection device structures and related fabrication methods are provided. An exemplary semiconductor protection device includes a base well region having a first conductivity type, an emitter region within the base well region having a second conductivity type opposite the first conductivity type, a collector region having the second conductivity type, a first floating region having the second conductivity type within the base well region between the emitter region and the collector region, and a second floating region having the first conductivity type within the base well region between the first floating region and the collector region. The floating regions within the base well region are electrically connected to reduce current gain and improve holding voltage.
1. A semiconductor device comprising:
a first region of semiconductor material having a first conductivity type;
a second region of semiconductor material within the first region, the second region having a second conductivity type opposite the first conductivity type;
a third region of semiconductor material having the second conductivity type;
a fourth region of semiconductor material, the fourth region having the first conductivity type;
a fifth region of semiconductor material within the first region, the fifth region having the second conductivity type; and
a sixth region of semiconductor material within the first region, the sixth region having the first conductivity type, wherein:
a portion of the first region is disposed between the second region and the third region;
the fifth region is disposed between the second region and the third region;
the sixth region is disposed between the second region and the third region;
the fourth region and the second region are electrically connected;
the fifth region and the sixth region are electrically connected; and
the fifth region and the sixth region are floating.
2. The semiconductor device of claim 1 , wherein:
the first region comprises a base well region;
the second region comprises an emitter region;
the third region comprises a collector region; and
the fourth region comprises a base contact region.
3. The semiconductor device of claim 1 , wherein the first region is spaced apart from the third region.
4. The semiconductor device of claim 1 , wherein:
the fifth region is disposed between the second region and the sixth region; and
the sixth region is disposed between the fifth region and the third region.
5. The semiconductor device of claim 4 , wherein the second region is disposed between the fourth region and the fifth region.
6. The semiconductor device of claim 1 , wherein the fifth region and the sixth region are abutting.
7. The semiconductor device of claim 1 , wherein:
the second region and the fourth region are short-circuited together; and
the fifth region and the sixth region are short-circuited together.
8. The semiconductor device of claim 1 , wherein the fourth region resides within the first region.
9. The semiconductor device of claim 1 , further comprising:
a buried region of semiconductor material having the second conductivity type, wherein third region abuts the buried region; and
a seventh region of semiconductor material underlying the first region, the seventh region having the first conductivity type, wherein the buried region abuts the seventh region.
10. The semiconductor device of claim 1 , further comprising:
a substrate including a handle layer of semiconductor material and a buried layer of dielectric material overlying the handle layer; and
a seventh region of semiconductor material underlying the first region, the seventh region having the first conductivity type, wherein the seventh region abuts the buried layer of dielectric material.
11. A semiconductor device comprising:
a first region of semiconductor material having a first conductivity type;
a second region of semiconductor material within the first region, the second region having a second conductivity type opposite the first conductivity type;
a third region of semiconductor material having the second conductivity type;
a fourth region of semiconductor material, the fourth region having the first conductivity type;
a fifth region of semiconductor material within the first region, the fifth region having the second conductivity type;
a sixth region of semiconductor material within the first region, the sixth region having the first conductivity type; and
a seventh region of semiconductor material having the first conductivity type and a dopant concentration that is less than a dopant concentration of the first region, wherein:
a portion of the first region is disposed between the second region and the third region;
the fifth region is disposed between the second region and the third region;
the sixth region is disposed between the second region and the third region;
the fourth region and the second region are electrically connected;
the fifth region and the sixth region are electrically connected;
the first region is spaced apart from the third region; and
at least a portion of the seventh region resides between the first region and the third region.
12. A semiconductor device comprising:
a first region of semiconductor material having a first conductivity type;
a second region of semiconductor material within the first region, the second region having a second conductivity type opposite the first conductivity type;
a third region of semiconductor material having the second conductivity type;
a fourth region of semiconductor material, the fourth region having the first conductivity type;
a fifth region of semiconductor material within the first region, the fifth region having the second conductivity type;
a sixth region of semiconductor material within the first region, the sixth region having the first conductivity type; and
a seventh region of semiconductor material having the first conductivity type and a dopant concentration that is less than a dopant concentration of the first region, wherein:
a portion of the first region is disposed between the second region and the third region;
the fifth region is disposed between the second region and the third region;
the sixth region is disposed between the second region and the third region;
the fourth region and the second region are electrically connected;
the fifth region and the sixth region are electrically connected; and
the fourth region is electrically coupled to the first region via a portion of the seventh region disposed between the first region and the fourth region.
13. The semiconductor device of claim 12 , wherein:
the first region comprises a first base well region;
the second region comprises an emitter region;
the third region comprises a collector region;
the fourth region comprises a base contact region; and
the seventh region comprises a second base well region.
14. A protection device structure comprising:
a first base well region of semiconductor material having a first conductivity type;
an emitter region of semiconductor material within the first base well region, the emitter region having a second conductivity type opposite the first conductivity type;
a collector region of semiconductor material having the second conductivity type, wherein at least a portion of the first base well region is disposed between the emitter region and the collector region;
a base contact region of semiconductor material having the first conductivity type, wherein at least a portion of the first base well region is disposed between the base contact region and the emitter region and the emitter region is disposed between the base contact region and the collector region;
a first region of semiconductor material within the first base well region, the first region having the second conductivity type;
a second region of semiconductor material within the first base well region, the second region having the first conductivity type;
a second base well region of semiconductor material having the first conductivity type, the collector region being disposed between the first base well region and the second base well region;
a second emitter region of semiconductor material within the second base well region, the second emitter region having the second conductivity type; and
a second base contact region of semiconductor material having the first conductivity type, wherein:
the second region is disposed between the first region and the collector region;
the first region is disposed between the emitter region and the collector region;
the first region and the second region are electrically connected;
the base contact region and the emitter region are electrically connected;
at least a portion of the second base well region is disposed between the second base contact region and the second emitter region;
the emitter region is disposed between the second base contact region and the collector region; and
the second base contact region and the second emitter region are electrically connected.
15. The protection device structure of claim 14 , wherein:
the first region and the second region are short-circuited; and
the base contact region and the emitter region are short-circuited.
16. A device including the protection device structure of claim 14 , the device further comprising:
a first interface coupled to the second base contact region;
a second interface coupled to the base contact region; and
functional circuitry coupled to the first interface and the second interface, wherein:
the first region and the second region are short-circuited;
the base contact region and the emitter region are short-circuited; and
the second base contact region and the second emitter region are short-circuited.
17. A semiconductor device comprising:
a base well region of semiconductor material having a first conductivity type;
an emitter region of semiconductor material within the base well region, the emitter region having a second conductivity type opposite the first conductivity type;
a collector region of semiconductor material having the second conductivity type;
a base contact region of semiconductor material, the base contact region having the first conductivity type;
a first floating region of semiconductor material within the base well region, the first floating region having the second conductivity type; and
a second floating region of semiconductor material within the base well region, the second floating region having the first conductivity type, wherein:
a portion of the base well region is disposed between the emitter region and the collector region;
the first floating region is disposed between the emitter region and the second floating region;
the second floating region is disposed between the first floating region and the collector region;
the base contact region and the emitter region are electrically connected; and
the first floating region and the second floating region are electrically connected.