IP Library Granted Patent US 9,496,210
Granted Patent B1
US 9,496,210 · App. 13/912,540 · Granted Nov 15, 2016

Stackable package and method

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Quick Facts
Patent No.
US 9,496,210
App. No.
13/912,540
Granted
Nov 15, 2016
Kind
B1
Abstract

A stackable package is placed within a mold during an encapsulation operation. A compliant surface, e.g., of a compliant film, of the mold is pressed down on upper interconnection balls of the stackable package to force upper portions of the upper interconnection balls into the mold. However, lower portions of the upper interconnection balls are exposed within a space between the compliant surface and a substrate of the stackable package. The space is filled with a dielectric material to form a package body. The package body is formed while at the same time exposing the upper portions of upper interconnection balls from the package body in a single encapsulation operation. By avoiding selective removal of the package body to expose the upper interconnection balls, the number of operations as well as cost to manufacture the stackable package is minimized.

Claims (24)

1. An electronic package comprising:

a substrate;

a first terminal on a first surface of the substrate;

an electronic component on the first surface of the substrate and coupled to the first terminal;

a second terminal on the first surface of the substrate;

a package-to-package interconnection structure on the first surface of the substrate and coupled to the second terminal, the interconnection structure extending a first distance from the first surface of the substrate;

a package body on the first surface of the substrate, wherein:

the package body contacts and surrounds at least a portion of the interconnection structure;

the package body extends a second distance from the first surface of the substrate; and

the second distance is greater than half of the first distance; and

a trace on the first surface of the substrate that electrically couples the interconnection structure and the electronic component,

wherein the interconnection structure is electrically isolated from a second surface of the substrate opposite the first surface of the substrate.

2. The electronic package of claim 1 , wherein the package body comprises a pocket in which the interconnection structure is positioned, the pocket having a width that increases from a minimum width at a first end of the pocket at the second terminal to a maximum width at a second end of the pocket.

3. The electronic package of claim 2 , wherein the width of the pocket continually increases from the first end of the pocket to the second end of the pocket.

4. The electronic package of claim 1 , wherein the interconnection structure comprises copper.

5. The electronic package of claim 1 , comprising:

a third terminal on the first surface of the substrate;

a second package-to-package interconnection structure on the first surface of the substrate and coupled to the third terminal; and

a conductive via extending through the substrate and electrically coupled to the second interconnection structure, and wherein the second interconnection structure is electrically isolated from the electronic component.

6. The electronic package of claim 1 , wherein the interconnection structure comprises only a single conductive ball.

7. The electronic package of claim 1 , wherein the electronic component comprises a first component surface that faces away from the substrate, and at least the first component surface is exposed from the package body.

8. The electronic package of claim 7 , wherein the electronic component comprises peripheral side surfaces, and at least a portion of each of the peripheral side surfaces is exposed from the package body.

9. The electronic package of claim 1 , wherein the interconnection structure is coupled to the second terminal at a first end of the interconnection structure, and a second end of the interconnection structure is planar.

10. The electronic package of claim 1 , wherein the electronic component comprises a first component surface facing the substrate and a second component surface opposite the first component surface, and the package body covers the second component surface.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2024
From: DARVEAUX, ROBERT FRANCIS; ST. AMAND, ROGER D.; PERELMAN, VLADIMIR
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 066188/0945 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
PATENT SECURITY AGREEMENT Recorded May 7, 2015
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 035613/0592 →