IP Library › Granted Patent US 9,499,399
Granted Patent B2
US 9,499,399 · App. 13/917,655 · Granted Nov 22, 2016

Method for forming MEMS structure with an etch stop layer buried within inter-dielectric layer

Inventors: Li-Che Chen (Pingtung County, TW); Te-Yuan Wu (Hsinchu, TW); Chia-Huei Lin (New Taipei, TW); Hui-Min Wu (Hsinchu County, TW); Kun-Che Hsieh (Tainan, TW); Kuan-Yu Wang (New Taipei, TW); Chung-Yi Chiu (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
B81C1/00801B81C1/00246B81C2201/014B81C2203/0714B81C2203/0735
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Quick Facts
Patent No.
US 9,499,399
App. No.
13/917,655
Granted
Nov 22, 2016
Kind
B2
Abstract

A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer.

Claims (14)

1. A method of forming a MEMS structure, comprising:

forming a metal structure and an inter-dielectric layer on a front side of a substrate, a first etch stop layer buried within the inter-dielectric layer and contacting the metal structure directly while the inter-dielectric layer surrounds the sidewalls and top surface of the first etch stop layer, and a MEMS component on the first etch stop layer;

grinding the backside of the substrate; and

etching the substrate and the inter-dielectric layer to stop at the first etch stop layer to form a chamber; and

removing part of the first etch stop layer after removing part of the substrate and part of the inter-dielectric layer to expose a bottom surface of the inter-dielectric layer.

2. The method of forming a MEMS structure according to claim 1 , wherein, the metal structure comprises a top metal layer, a bottom metal layer and a metal layer between the top metal layer and the bottom metal layer, and the first etch stop layer is formed to extend onto the top metal layer.

3. The method of forming a MEMS structure according to claim 1 , wherein, the metal structure comprises a first metal layer, a second metal layer, a third metal layer, a fourth metal layer, a fifth metal layer and a sixth metal layer in the order from bottom to top, and the first etch stop layer is formed to extend onto the third or fourth metal layer.

4. The method of forming a MEMS structure according to claim 1 , wherein, an opening is formed to pass through the first etch stop layer by etching the first etch stop layer to partially remove the first etch stop layer.

5. The method of forming a MEMS structure according to claim 1 , wherein, the step of etching the substrate and the inter-dielectric layer to stop at the first etch stop layer to form the chamber comprises a plurality of anisotropic etch processes performed in a same etching chamber.

6. The method of forming a MEMS structure according to claim 1 , wherein, the MEMS component comprises a metal diaphragm for storing charges.

7. The method of forming a MEMS structure according to claim 1 , wherein, the MEMS component comprises a conductive electrode structure.

8. The method of forming a MEMS structure according to claim 1 , further comprising forming a second etch stop layer on the first etch stop layer, wherein an etch selectivity of the first etch stop layer to the second etch stop layer is greater than 1.

9. The method of forming a MEMS structure according to claim 8 , wherein, the first etch stop layer is etched and partially removed so as to form an opening exposing the second etch stop layer.

10. The method of forming a MEMS structure according to claim 8 , further comprising performing a wet cleaning process, wherein the second etch stop layer protects the inter-dielectric layer during the wet cleaning process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2013
From: CHEN, LI-CHE; WU, TE-YUAN; LIN, CHIA-HUEI; WU, HUI-MIN; HSIEH, KUN-CHE; WANG, KUAN-YU; CHIU, CHUNG-YI
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 030610/0838 →
Continuity (1)
Related Publication 20140367805A1 · Dec 18, 2014