IP Library Granted Patent US 8,900,995
Granted Patent B1
US 8,900,995 · App. 13/927,964 · Granted Dec 2, 2014

Semiconductor device and manufacturing method thereof

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Quick Facts
Patent No.
US 8,900,995
App. No.
13/927,964
Granted
Dec 2, 2014
Kind
B1
Abstract

A semiconductor device and a manufacturing method thereof are provided. In one embodiment of the manufacturing method of the semiconductor device, a through electrode is formed on a semiconductor die, and a dielectric layer such as a photopolymer is coated on the through electrode to cover the through electrode. Under exposure is performed on the dielectric layer, thereby partially removing the dielectric layer by development. As a result, a top end of the through electrode is exposed to the outside or protrudes through the dielectric layer. The dielectric layer remaining on the top end of the through electrode may be removed by performing a plasma descum process, if needed.

Claims (37)

1. A method comprising:

forming a through electrode to protrude from a first surface of a semiconductor die;

coupling a dielectric layer to the through electrode and the first surface of the semiconductor die;

partially removing the dielectric layer such that a thickness of the remaining dielectric layer is greater than a thickness of the through electrode protruding from the first surface of the semiconductor die; and

plasma etching the remaining dielectric layer to expose a top end of the through electrode.

2. The method of claim 1 , wherein the dielectric layer comprises a photopolymer.

3. The method of claim 1 , wherein the partially removing is performed by applying an under exposure dose that is smaller than an appropriate exposure dose to the dielectric layer.

4. The method of claim 1 , wherein the dielectric layer has a thickness greater than a thickness of the through electrode protruding from the first surface of the semiconductor die.

5. The method of claim 1 further comprising curing the remaining dielectric layer.

6. The method of claim 1 wherein the plasma etching comprises performing a plasma descum process to remove a surface of the remaining dielectric layer using plasma.

7. A method comprising:

forming a through electrode to protrude to the outside of a first surface of a semiconductor die;

covering the through electrode and the first surface of the semiconductor die with a dielectric layer;

applying an under exposure dose to the dielectric layer;

developing the dielectric layer to partially remove the dielectric layer, wherein a portion of the dielectric layer remains as a remaining dielectric layer;

curing the remaining dielectric layer; and

performing a plasma descum process on the remaining dielectric layer.

8. The method of claim 7 wherein the performing a plasma descum process comprises removing a surface of the remaining dielectric layer using plasma.

9. The method of claim 7 wherein the performing a plasma descum process comprises forming a curved surface on the remaining dielectric layer.

10. The method of claim 9 wherein the curved surface surrounds the through electrode.

11. The method of claim 9 wherein a thickness of the remaining dielectric layer is greatest at the through electrode.

12. The method of claim 11 wherein the thickness of the remaining dielectric layer decreases away from the through electrode.

13. The method of claim 7 wherein the forming a through electrode comprises:

forming a through hole in the semiconductor die;

forming an insulation layer on an inner wall of the through hole; and

filling the though hole with a conductive material.

14. The method of claim 13 further comprising:

back grinding the first surface of the semiconductor die; and

etching the first surface of the semiconductor die and the insulation layer to expose the through electrode.

15. A method comprising:

forming a through electrode extending through a semiconductor die, the through electrode protruding to an outside of a first surface of the semiconductor die; and

forming a dielectric layer directly contacting the first surface of the semiconductor die, the through electrode being exposed from the dielectric layer, wherein the dielectric layer comprises a curved surface surrounding and extending directly from the through electrode such that the dielectric layer has a decreasing thickness in a direction perpendicular to the first surface away from the through electrode, the dielectric layer being between the curved surface and the first surface of the semiconductor die.

16. The method of claim 15 further comprising forming a conductive pad coupled to a second surface of the semiconductor die.

17. The method of claim 16 , wherein the conductive pad and the through electrode are electrically connected to each other.

18. The method of claim 16 wherein the through electrode covers the conductive pad.

19. The method of claim 15 further comprising electrically isolating the through electrode from a bulk of the semiconductor die with an insulation layer.

20. The method of claim 19 wherein the semiconductor die further comprising a through-hole, the insulation layer being formed on an inner wall of the through-hole.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2024
From: DO, WON CHUL; JUNG, YEON SEUNG; KO, YONG JAE
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 066069/0696 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
PATENT SECURITY AGREEMENT Recorded May 7, 2015
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 035613/0592 →