IP Library Granted Patent US 9,401,342
Granted Patent B2
US 9,401,342 · App. 13/929,688 · Granted Jul 26, 2016

Semiconductor package having wire bond wall to reduce coupling

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Quick Facts
Patent No.
US 9,401,342
App. No.
13/929,688
Granted
Jul 26, 2016
Kind
B2
Abstract

A system and method for a package including a wire bond wall to reduce coupling is presented. The package includes a substrate, and a first circuit on the substrate. The first circuit includes a first electrical device, a second electrical device, and a first wire bond array interconnecting the first electrical device and the second electrical device. The package includes a second circuit on the substrate adjacent to the first circuit, the second circuit includes a second wire bond array interconnecting a third electrical device and a fourth electrical device. The package includes a wire bond wall including a plurality of wire bonds over the substrate between the first circuit and the second circuit. The wire bond wall is configured to reduce an electromagnetic coupling between the first circuit and the second circuit during an operation of at least one of the first circuit and the second circuit.

Claims (52)

1. A package, comprising:

a substrate;

a first circuit on the substrate, the first circuit including a first electrical device, a second electrical device, and a first wire bond array interconnecting the first electrical device and the second electrical device;

a second circuit on the substrate adjacent to the first circuit, the second circuit including a third electrical device, a fourth electrical device, and a second wire bond array interconnecting the third electrical device and the fourth electrical device;

a plurality of connection pads on the substrate between the first circuit and the second circuit; and

a wire bond wall including a plurality of wire bonds over the substrate between the first circuit and the second circuit and electrically connecting the plurality of connection pads, the wire bond wall being configured to reduce an electromagnetic coupling between the first circuit and the second circuit during an operation of at least one of the first circuit and the second circuit.

2. The package of claim 1 , wherein the plurality of wire bonds are interconnected and run along a region of the substrate that is between at least a portion of the first circuit and the second circuit.

3. The package of claim 1 , wherein the plurality of wire bonds are arranged in at least a first row of wire bonds and a second row of wire bonds and wherein the first row of wire bonds is arranged in parallel with the second row of wire bonds.

4. The package of claim 1 , wherein the first circuit is a carrier amplifier of a Doherty amplifier.

5. The package of claim 4 , wherein the second circuit is a peaking amplifier of the Doherty amplifier.

6. The package of claim 1 , wherein the wire bond wall is connected to a ground voltage terminal.

7. The package of claim 1 , wherein the wire bond wall is connected to an integrated passive device.

8. The package of claim 7 , wherein at least one of a capacitance and an inductance of the integrated passive device is selected to reduce an electromagnetic coupling between the first circuit and the second circuit over a range of frequencies when the integrated passive device is connected to the wire bond wall.

9. The package of claim 1 , wherein at least one of the first electrical device, second electrical device, third electrical device, and fourth electrical device includes at least one of a capacitor, and a transistor.

10. A Doherty amplifier package, comprising:

a substrate;

a carrier amplifier on the substrate;

a peaking amplifier on the substrate adjacent to the carrier amplifier; and

a plurality of wire bonds on the substrate, the plurality of wire bonds being interconnected and running along a region of the substrate located between at least a portion of the carrier amplifier and the peaking amplifier, the plurality of wire bonds forming a wire bond wall configured to reduce an electromagnetic coupling between the carrier amplifier and the peaking amplifier during an operation of at least one of the carrier amplifier and the peaking amplifier.

11. The Doherty amplifier package of claim 10 , including a plurality of connection pads over the substrate and wherein the plurality of wire bonds electrically interconnect the connection pads.

12. The Doherty amplifier package of claim 11 , wherein the plurality of connection pads are connected to a ground voltage.

13. The Doherty amplifier package of claim 10 , wherein the plurality of wire bonds are connected to a ground voltage terminal.

14. The Doherty amplifier package of claim 10 , wherein the plurality of wire bonds are connected to an integrated passive device.

15. The Doherty amplifier package of claim 14 , wherein the integrated passive device has at least one of a capacitance and an inductance selected to reduce an electromagnetic coupling between the carrier amplifier and the peaking amplifier over a range of frequencies when the integrated passive device is connected to the plurality of wire bonds and during an operation of at least one of the carrier amplifier and the peaking amplifier.

16. The Doherty amplifier package of claim 10 , wherein:

the carrier amplifier includes a first wire bond array interconnecting a first electrical device of the carrier amplifier and a second electrical device of the carrier amplifier; and

the peaking amplifier includes a second wire bond array interconnecting a third electrical device of the carrier amplifier and a fourth electrical device of the carrier amplifier.

17. A method, comprising:

attaching a carrier amplifier on a substrate;

attaching a peaking amplifier on the substrate adjacent to the carrier amplifier; and

forming a plurality of interconnected wire bonds on the substrate along a region of the substrate located between at least a portion of the carrier amplifier and the peaking amplifier, the plurality of wire bonds forming a wire bond wall configured to reduce an electromagnetic coupling between the carrier amplifier and the peaking amplifier during an operation of at least one of the carrier amplifier and the peaking amplifier.

18. The method of claim 17 , including forming a plurality of connection pads over the substrate, wherein the plurality of wire bonds electrically interconnect the connection pads.

19. The method of claim 18 , including connecting the plurality of connection pads to a ground voltage terminal.

20. The method of claim 17 , including:

mounting an integrated passive device to the substrate; and

connecting the plurality of wire bonds to the integrated passive device.

21. A package, comprising:

a substrate;

a first circuit on the substrate;

a second circuit on the substrate adjacent to the first circuit;

an electronic component on the substrate between the first circuit and the second circuit;

a first lead on a first side of the package connected to the first circuit;

a second lead on a second side of the package connected to the first circuit, the second side of the package being opposite the first side of the package;

a third lead on the first side of the package connected to the second circuit;

a fourth lead on the second side of the package connected to the second circuit;

a first terminal on the first side of the package between the first lead and the second lead, the first terminal being connected to the electronic component; and

a second terminal on the second side of the package between the third lead and the fourth lead, the second terminal being connected to the electronic component.

22. The package of claim 21 , wherein the electronic component is configured to reduce an electromagnetic coupling between the first circuit and the second circuit during an operation of at least one of the first circuit and the second circuit.

23. The package of claim 22 , wherein the electronic component includes a wire bond wall.

24. The package of claim 23 , including a plurality of connection pads over the substrate and wherein the wire bonds of the wire bond wall electrically interconnect the connection pads.

25. The package of claim 23 , wherein the wire bond wall is connected to an integrated passive device.

26. The package of claim 3 , wherein a first wire bond in the first row of wire bonds is connected to a first connection pad in the plurality of connection pads and none of the wire bonds in the second row of wire bonds are connected to the first connection pad.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
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From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
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From: KUO, SHUN MEEN; SZYMANOWSKI, MARGARET; HART, PAUL
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