DIE-TO-DIE INDUCTIVE COMMUNICATION DEVICES AND METHODS
Embodiments of inductive communication devices include first and second galvanically isolated IC die. The first IC die has a first coil proximate to a first surface of the first IC die, and the second IC die has a second coil proximate to a first surface of the second IC die. The first and second IC die are arranged so that the first surfaces of the first and second IC die face each other, and the first coil and the second coil are aligned across a gap between the first and second IC die. One or more dielectric components are positioned within the gap directly between the first and second coils. During operation, a first signal is provided to the first coil, and the first coil converts the signal into a time-varying magnetic field. The magnetic field couples with the second coil, which produces a corresponding second signal.
1 . A device comprising:
a first integrated circuit (IC) die having a first coil proximate to a first surface of the first IC die;
a second IC die having a second coil proximate to a first surface of the second IC die, wherein the first IC die and the second IC die are arranged within the device so that the first surface of the first IC die faces the first surface of the second IC die, and the first coil and the second coil are aligned with each other across a gap between the first IC die and the second IC die, and wherein the first IC die and the second IC die are galvanically isolated from each other; and
one or more dielectric components within the gap, which are positioned directly between the first coil and the second coil.
2 . The device of claim 1 , wherein:
the first IC die further includes a plurality of first bond pads exposed at the first surface of the first IC die, wherein the plurality of first bond pads are electrically coupled to the first coil; and
the second IC die further includes a plurality of second bond pads exposed at the first surface of the second IC die, wherein the plurality of second bond pads are electrically coupled to the second coil.
3 . The device of claim 1 , wherein:
the first IC die further includes a plurality of first bond pads exposed at the first surface of the first IC die, wherein the plurality of first bond pads are electrically coupled to the first coil; and
the second IC die further includes a semiconductor substrate, a plurality of conductive through-silicon vias extending through the semiconductor substrate, and a plurality of second bond pads electrically coupled to the plurality of through-silicon vias and exposed at a second surface of the IC die that is opposite the first surface of the second IC die.
4 . The device of claim 1 , wherein:
the first IC die further includes a plurality of first bond pads that are electrically coupled to the first coil; and
the second IC die further includes a plurality of second bond pads that are electrically coupled to the second coil, and wherein the device further comprises
first electrical connections coupled to the first bond pads; and
second electrical connections coupled to the second bond pads, and
wherein the first electrical connections and the second electrical connections are selected from wirebonds, solder bumps, stud bumps, and direct chip attach structures.
5 . The device of claim 4 , further comprising:
a plurality of package leads, wherein the first electrical connections are coupled between the first bond pads and a first set of the package leads, and the second electrical connections are coupled between the second bond pads and a second set of the package leads.
6 . The device of claim 5 , further comprising:
a support structure, wherein a second surface of the first IC die is coupled to the support structure, and wherein the support structure and the plurality of package leads form portions of a leadframe.
7 . The device of claim 1 , wherein:
the first coil is formed from a plurality of first patterned conductors in a plurality of first metal layers that are separated by one or more first dielectric layers; and
the second coil is formed from a plurality of second patterned conductors in a plurality of second metal layers that are separated by one or more second dielectric layers.
8 . The device of claim 1 , wherein:
the first IC die further includes transmitter circuitry coupled to the first coil; and
the second IC die further includes receiver circuitry coupled to the second coil.
9 . The device of claim 1 , wherein the one or more dielectric components include one or more of: a material selected from polyimide, polytetrafluorethylene, and benzocyclobutene; a portion of a dielectric layer overlying the first coil; a portion of a dielectric layer overlying the second coil; and an air gap.
10 . The device of claim 1 , wherein the one or more dielectric components includes a dielectric material with a thickness in a range of about 25 micrometers to about 400 micrometers.
11 . The device of claim 1 , wherein the one or more dielectric components include a dielectric structure having a first surface and an opposing second surface, wherein the first surface of the dielectric structure is coupled to the first surface of the first IC die, the second surface of the dielectric structure is coupled to the first surface of the second IC die, and the dielectric structure extends beyond overlapping edges of the first IC die and the second IC die.
12 . The device of claim 1 , wherein:
the first IC die further includes one or more additional first coils proximate to the first surface of the first IC die;
the second IC die further includes one or more additional second coils proximate to the first surface of the second IC die, wherein each of the additional first coils is aligned with a corresponding one of the additional second coils across the gap; and
the one or more dielectric components are positioned within the gap directly between aligned pairs of the additional first coils and the additional second coils.
13 . The device of claim 1 , wherein the first IC die, the second IC die, and the one or more dielectric components are packaged together in an air-cavity package.
14 . The device of claim 1 , wherein the first IC die, the second IC die, and the one or more dielectric components are packaged together in an overmolded package.
15 . An inductive communication method comprising the steps of:
providing a first signal to a first coil of a first integrated circuit (IC) die, wherein the first coil is proximate to a first surface of the first IC die, and the first coil converts the first signal into a time-varying magnetic field around the first coil; and
receiving a second signal by a second coil of a second IC die as a result of the time-varying magnetic field coupling with the second coil, wherein the second coil is proximate to a first surface of the second IC die, and wherein the first IC die and the second IC die are arranged within an integrated circuit package so that the first surface of the first IC die faces the first surface of the second IC die, and the first coil and the second coil are aligned with each other across a gap between the first IC die and the second IC die so that the first IC die and the second IC die are galvanically isolated from each other.
16 . The method of claim 15 , wherein one or more dielectric components are present in the gap between the first IC die and the second IC die, and the time-varying magnetic field extends across the gap through the one or more dielectric components.
17 . The method of claim 15 , further comprising:
receiving an input signal at a bond pad of the first IC die;
converting the input signal to the first signal by transmitter circuitry of the first IC die;
receiving the second signal by receiver circuitry of the second IC die;
producing, by the receiver circuitry, a reconstructed version of the input signal from the second signal; and
providing the reconstructed version of the input signal to a second bond pad of the second IC die.
18 . A method of manufacturing an inductive communication device, the method comprising the steps of:
coupling together a first integrated circuit (IC) die, a dielectric structure, and a second IC die, wherein the first IC die has a first coil proximate to a first surface of the first IC die, the second IC die has a second coil proximate to a first surface of the second IC die, the first IC die and the second IC die are oriented so that the first surface of the first IC die faces the first surface of the second IC die, and the first coil and the second coil are aligned with each other across a gap between the first IC die and the second IC die, and wherein the dielectric structure is positioned within the gap directly between the first coil and the second coil;
electrically connecting a plurality of first bond pads of the first IC die to first package leads; and
electrically connecting a plurality of second bond pads of the second IC die to second package leads.
19 . The method of claim 18 , further comprising:
forming the first IC die by forming, over a first semiconductor substrate, a plurality of first patterned conductive layers, wherein the first coil is formed from multiple substantially-concentric first conductive rings of the first patterned conductive layers and first conductive vias between the first patterned conductive layers; and
forming the second IC die by forming, over a second semiconductor substrate, a plurality of second patterned conductive layers, wherein the second coil is formed from multiple substantially-concentric second conductive rings of the second patterned conductive layers and second conductive vias between the second patterned conductive layers.
20 . The method of claim 19 , wherein:
forming the first IC die further comprises forming first communication circuitry between the plurality of first bond pads and the first coil; and
forming the second IC die further comprises forming second communication circuitry between the plurality of second bond pads and the second coil.
21 . The method of claim 19 , wherein:
forming the second IC die further comprises forming a plurality of through-silicon vias through the second semiconductor substrate, wherein the plurality of second bond pads are electrically coupled to the plurality of through silicon vias, and the plurality of second bond pads are exposed at a second surface of the second IC die that is opposite the first surface of the second IC die.
22 . The method of claim 18 , wherein:
the plurality of first bond pads are electrically connected to the first package leads with a first plurality of electrical connections; and
the plurality of second bond pads are electrically connected to the second package leads with a second plurality of electrical connections, and
wherein the first electrical connections and the second electrical connections are selected from wirebonds, solder bumps, stud bumps, and direct chip attach structures.