IP Library Granted Patent US 9,620,480
Granted Patent B1
US 9,620,480 · App. 13/930,287 · Granted Apr 11, 2017

Integrated circuit packaging system with unplated leadframe and method of manufacture thereof

Inventors: Garret Dimaculangan (Singapore, SG); Linda Pei Ee Chua (Singapore, SG); Byung Tai Do (Singapore, SG); Arnel Senosa Trasporto (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd
H01L24/89H01L23/495H01L21/4821H01L21/56H01L23/49558H01L23/49586H01L23/52
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Quick Facts
Patent No.
US 9,620,480
App. No.
13/930,287
Granted
Apr 11, 2017
Kind
B1
Abstract

An integrated circuit packaging system and method of manufacture thereof including: providing an unplated leadframe having a contact protrusion; forming a contact pad and traces by etching the unplated leadframe; applying a trace protection layer on the contact pad and the traces; forming a recess in the trace protection layer by etching a top surface of the contact pad to a recess distance below a top surface of the trace protection layer; and depositing an external connector directly on the top surface of the contact pad.

Claims (22)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a contact pad and traces by etching an unplated leadframe, the unplated leadframe having a contact protrusion;

applying a trace protection layer on the contact pad and the traces;

forming a recess in the trace protection layer by etching a top surface of the contact pad to a recess distance below a top surface of the trace protection layer; and

depositing an external connector directly on the top surface of the contact pad.

2. The method as claimed in claim 1 further comprising:

connecting an integrated circuit die to the contact protrusion; and

depositing an encapsulation on the integrated circuit die and the unplated leadframe.

3. The method as claimed in claim 1 wherein forming the contact pad and the traces includes forming the contact pad and the traces using an anisotropic etching process.

4. The method as claimed in claim 1 wherein depositing the external connector includes depositing the external connector in the recess.

5. The method as claimed in claim 1 further comprising cleaning the contact pad and the traces using a plasma cleaning process.

6. A method of manufacture of an integrated circuit packaging system comprising:

connecting an integrated circuit die to a contact protrusion of an unplated leadframe;

depositing an encapsulation on the integrated circuit die and the unplated leadframe;

forming a contact pad and traces by etching the unplated leadframe;

applying a trace protection layer on the contact pad and the traces;

forming a recess in the trace protection layer by etching a top surface of the contact pad to a recess distance below a top surface of the trace protection layer; and

depositing an external connector directly on the top surface of the contact pad.

7. The method as claimed in claim 6 wherein etching the top surface of the contact pad includes etching the top surface of the contact pad without creating defects, the top surface having a concave surface.

8. The method as claimed in claim 6 wherein forming the recess includes removing a portion of the trace protection layer with a buffing process.

9. The method as claimed in claim 6 wherein forming the recess includes removing a portion of the contact pad and a portion of the trace protection layer with chemical mechanical planarization.

10. The method as claimed in claim 6 wherein applying the trace protection layer includes applying the trace protection layer on the traces, the encapsulation, and the contact pad.

Assignments (2)
CHANGE OF NAME Recorded Jul 22, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 039439/0430 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2013
From: DIMACULANGAN, GARRET; CHUA, LINDA PEI EE; DO, BYUNG TAI; TRASPORTO, ARNEL SENOSA
To: STATS CHIPPAC LTD.
Reel/Frame 030709/0817 →