IP Library Granted Patent US 8,963,254
Granted Patent B2
US 8,963,254 · App. 13/933,191 · Granted Feb 24, 2015

Simultaneous formation of FinFET and MUGFET

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Quick Facts
Patent No.
US 8,963,254
App. No.
13/933,191
Granted
Feb 24, 2015
Kind
B2
Abstract

A method and structure comprise a field effect transistor structure that includes a first rectangular fin structure positioned on a substrate. The first rectangular fin structure has a bottom contacting the substrate, a top opposite the bottom, and sides between the top and the bottom. The structure additionally includes a second rectangular fin structure positioned on the substrate. Similarly, the second rectangular fin structure also has a bottom contacting the substrate, a top opposite the bottom, and sides between the top and the bottom. The sides of the second rectangular fin structure are parallel to the sides of the first rectangular fin structure. Further, a trench insulator is positioned on the substrate and is positioned between a side of the first rectangular fin structure and a side of the second rectangular fin structure.

Claims (28)

1. A field effect transistor structure comprising:

a substrate;

a first rectangular fin structure positioned on said substrate, said first rectangular fin structure having a bottom contacting said substrate, a top opposite said bottom, and sides between said top and said bottom;

a second rectangular fin structure positioned on said substrate, said second rectangular fin structure having a bottom contacting said substrate, a top opposite said bottom, and sides between said top and said bottom, said sides of said second rectangular fin structure being parallel to said sides of said first rectangular fin structure;

a trench insulator positioned on said substrate and positioned between a side of said first rectangular fin structure and a side of said second rectangular fin structure;

a gate conductor positioned on said trench insulator, positioned over said sides and said top of said first rectangular fin structure, and positioned over said sides and said top of said second rectangular fin structure, said gate conductor running perpendicular to said sides of said first rectangular fin structure and said sides of said second rectangular fin structure; and

a gate insulator positioned between said gate conductor and said first rectangular fin structure and between said gate conductor and said second rectangular fin structure,

a first cap on said top of said first rectangular fin structure, said first cap separating said gate conductor from said first rectangular fin structure,

said gate insulator separating said gate conductor only from said sides of said first rectangular fin structure, and said gate insulator separating said gate conductor from said sides and said top of said second rectangular fin structure.

2. The field effect transistor structure according to claim 1 , said first rectangular fin structure comprising a multiple gate field effect transistor (MUGFET) and said second rectangular fin structure comprising a fin-type field effect transistor (FINFET).

3. The field effect transistor structure according to claim 1 , further comprising a second cap on said first cap, said second cap being positioned between said first cap and said gate insulator.

4. The field effect transistor structure according to claim 1 , said first rectangular fin structure and said second rectangular fin structure being one of:

adjacent one another and forming parts of a single transistor device; and

separated from one another on said substrate, and forming parts of different transistor devices on said substrate.

5. The field effect transistor structure according to claim 1 , said substrate comprising a silicon-on-insulator substrate comprising a silicon layer on a buried oxide layer, said gate conductor contacting said buried oxide layer on each side of said first rectangular fin structure and said second rectangular fin structure.

6. A field effect transistor structure comprising:

a substrate;

a first rectangular fin structure positioned on said substrate, said first rectangular fin structure having a bottom contacting said substrate, a top opposite said bottom, and sides between said top and said bottom;

a second rectangular fin structure positioned on said substrate, said second rectangular fin structure having a bottom contacting said substrate, a top opposite said bottom, and sides between said top and said bottom, said sides of said second rectangular fin structure being parallel to said sides of said first rectangular fin structure;

a trench insulator positioned on said substrate and positioned between a side of said first rectangular fin structure and a side of said second rectangular fin structure;

a gate conductor positioned on said trench insulator, positioned over said sides and said top of said first rectangular fin structure, and positioned over said sides and said top of said second rectangular fin structure, said gate conductor running perpendicular to said sides of said first rectangular fin structure and said sides of said second rectangular fin structure; and

a gate insulator positioned between said gate conductor and said first rectangular fin structure and between said gate conductor and said second rectangular fin structure,

a first cap on said top of said first rectangular fin structure, said first cap separating said gate conductor from said first rectangular fin structure,

said gate insulator separating said gate conductor only from said sides of said first rectangular fin structure, and said gate insulator separating said gate conductor from said sides and said top of said second rectangular fin structure, and

said first rectangular fin structure and said second rectangular fin structure being adjacent one another and forming parts of a single transistor device.

7. The field effect transistor structure according to claim 6 , said first rectangular fin structure comprising a multiple gate field effect transistor (MUGFET) and said second rectangular fin structure comprising a fin-type field effect transistor (FINFET).

8. The field effect transistor structure according to claim 6 , further comprising a second cap on said first cap, said second cap being positioned between said first cap and said gate insulator.

9. The field effect transistor structure according to claim 6 , said substrate comprising a silicon-on-insulator substrate comprising a silicon layer on a buried oxide layer, said gate conductor contacting said buried oxide layer on each side of said first rectangular fin structure and said second rectangular fin structure.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2017
From: GLOBALFOUNDRIES INC.
To: AURIGA INNOVATIONS, INC.
Reel/Frame 041804/0940 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2013
From: ANDERSON, BRENT A.; NOWAK, EDWARD J.; RANKIN, JED H.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 031607/0652 →